AT32UC3A4128S Atmel Corporation, AT32UC3A4128S Datasheet - Page 814
AT32UC3A4128S
Manufacturer Part Number
AT32UC3A4128S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A4128S
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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- AT32UC3A0128 PDF datasheet
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- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
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- Download datasheet (16Mb)
30. MultiMedia Card Interface (MCI)
30.1
30.2
32072G–11/2011
Features
Overview
Rev. 4.1.0.0
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The Multimedia Card Interface (MCI) supports the MultiMedia Card (MMC) specification V4.3,
the SD Memory Card specification V2.0, the SDIO V1.1 specificationand CE-ATA specification
V1.1.
The MCI includes a Command Register (CMDR), Response Registers (RSPRn), data registers,
time-out counters and error detection logic that automatically handle the transmission of com-
mands and, when required, the reception of the associated responses and data with a limited
processor overhead.
The MCI supports stream, block and multi block data read and write, and is compatible with the
DMA Controller, minimizing processor intervention for large buffers transfers.
The MCI operates at a rate of up to CLK_MCI divided by 2 and supports the interfacing of 2.
Each slot may be used to interface with a MultiMediaCard bus (up to 30 Cards) or with a SD
Memory Card. Only one slot can be selected at a time (slots are multiplexed). The SDCard/SDIO
Slot Selection field in the SDCard/SDIO Register (SDCR.SDCSEL) performs this selection.
The SD Memory Card communication is based on a 9-pin interface (clock, command, four data
and three power lines) and the MultiMedia Card on a 7-pin to 13-pin nterface (clock, command,
one to eight data, three power lines and one reserved for future use).
The SD Memory Card interface also supports MultiMedia Card operations. The main differences
between SD and MultiMedia Cards are the initialization process and the bus topology.
MCI fully supports CE-ATA Revision 1.1, built on the MMC System specification V4.0. The mod-
ule includes dedicated hardware to issue the command completion signal and capture the host
command completion signal disable.
Compatible with Multimedia Card specification version 4.3
Compatible with SD Memory Card specification version 2.0
Compatible with SDIO specification version 1.1
Compatible with CE-ATA specification 1.1
Cards clock rate up to master clock divided by two
Boot Operation Mode support
High Speed mode support
Embedded power management to slow down clock rate when not used
Supports 2
Support for stream, block and multi-block data read and write
Supports connection to DMA Controller
Built in FIFO (from 16 to 256 bytes) with large memory aperture supporting incremental access
Support for CE-ATA completion cignal disable command
Protection against unexpected modification on-the-Fly of the configuration registers
– Each slot for either a MultiMediaCard bus (up to 30 cards) or an SD Memory Card
– Minimizes processor intervention for large buffer transfers
814
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