AT32UC3A0512AU Atmel Corporation, AT32UC3A0512AU Datasheet - Page 714

• Manufacturer Part Number: AT32UC3A0512AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A0512AU

• Flash (kbytes): 512 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 109
• Ext Interrupts: 109
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058K AVR32-01/12
33.7.6
Name:
Access Type:
Offset:
Reset Value:
• RXBUFF: RX Buffer Full
0 = RCR or RNCR have a value other than 0.
1 = Both RCR and RNCR have a value of 0.
• ENDRX: End of RX Buffer
0 = The Receive Counter Register has not reached 0 since the last write in RCR or RNCR.
1 = The Receive Counter Register has reached 0 since the last write in RCR or RNCR.
• GOVRE: General Overrun Error
0 = No General Overrun Error occurred since the last read of SR.
1 = At least one General Overrun Error has occurred since the last read of SR.
• DRDY: Data Ready
0 = No data has been converted since the last read of LCDR.
1 = At least one data has been converted and is available in LCDR.
• OVREx: Overrun Error x
0 = No overrun error on the corresponding channel(if implemented) since the last read of SR.
1 = There has been an overrun error on the corresponding channel (if implemented) since the last read of SR.
• EOCx: End of Conversion x
0 = Corresponding analog channel (if implemented) is disabled, or the conversion is not finished.
1 = Corresponding analog channel (if implemented) is enabled and conversion is complete.
OVRE7
EOC7
31
23
15
–
–
7
Status Register
OVRE6
EOC6
30
22
14
SR
Read-only
0x1C
0x000C0000
–
–
6
OVRE5
EOC5
29
21
13
–
–
5
OVRE4
EOC4
28
20
12
–
–
4
RXBUFF
OVRE3
EOC3
27
19
11
–
3
ENDRX
OVRE2
EOC2
26
18
10
–
2
GOVRE
OVRE1
EOC1
25
17
–
9
1
AT32UC3A
OVRE0
DRDY
EOC0
24
16
–
8
0
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