AT32UC3A0512AU Atmel Corporation, AT32UC3A0512AU Datasheet - Page 175

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AT32UC3A0512AU

Manufacturer Part Number
AT32UC3A0512AU
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A0512AU

Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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32058K AVR32-01/12
22.5
Table 22-2.
Offset
0x00
0x04
0x08
0x0C
0x10
General Purpose Input/Output (GPIO) User Interface
Register
GPIO Enable Register
GPIO Enable Register
GPIO Enable Register
GPIO Enable Register
Peripheral Mux Register 0
GPIO Register Map
The GPIO controls all the I/O pins on the AVR32 microcontroller. The pins are managed as 32-
bit ports that are configurable through an PB interface. Each port has a set of configuration reg-
isters. The overall memory map of the GPIO is shown below. The number of pins and hence the
number of ports is product specific.
In the Peripheral muxing table in the Peripherals chapter each GPIO line has a unique number.
Note that the PA, PB, PC and PX ports do not directly correspond to the GPIO ports. To find the
corresponding port and pin the following formulas can be used:
GPIO port = floor((GPIO number) / 32), example: floor((36)/32) = 1
GPIO pin = GPIO number mod 32, example: 36 mod 32 = 4
The table below shows the configuration registers for one port. Addresses shown are relative to
the port address offset. The specific address of a configuration register is found by adding the
register offset and the port offset to the GPIO start address. One bit in each of the configuration
registers corresponds to an I/O pin.
Function
Read/Write
Set
Clear
Toggle
Read/Write
Port 0 Configuration Registers
Port 1 Configuration Registers
Port 2 Configuration Registers
Port 3 Configuration Registers
Port 4 Configuration Registers
Name
GPER
GPERS
GPERC
GPERT
PMR0
Access
Read/Write
Write-Only
Write-Only
Write-Only
Read/Write
0x0000
0x0100
0x0200
0x0300
0x0400
Reset value
1b for each
implemented
GPIO pin in port
0x00000000
AT32UC3A
175

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