SC16C554IB64,151 NXP Semiconductors, SC16C554IB64,151 Datasheet - Page 55

• Manufacturer Part Number: SC16C554IB64,151
• Description: IC UART QUAD SOT314-2
• Manufacturer: NXP Semiconductors

Specifications of SC16C554IB64,151

• Number Of Channels: 4, QUART
• Fifo's: 16 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Transmit Fifo: 16Byte
• Receive Fifo: 16Byte
• Transmitter And Receiver Fifo Counter: Yes
• Data Rate: 5Mbps
• Package Type: LQFP
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935270074151; SC16C554IB64-S; SC16C554IB64-S

Philips Semiconductors
Contents
1
2
3
4
5
5.1
5.1.1
5.1.2
5.1.3
5.2
6
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
7
7.1
7.2
7.2.1
7.2.2
7.3
7.3.1
7.3.2
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
8
9
10
10.1
11
© Koninklijke Philips Electronics N.V. 2004.
Printed in the U.S.A.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 10 May 2004
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . 13
Register descriptions . . . . . . . . . . . . . . . . . . . 22
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 35
Static characteristics. . . . . . . . . . . . . . . . . . . . 36
Dynamic characteristics . . . . . . . . . . . . . . . . . 37
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 47
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
PLCC68 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
LQFP64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
LQFP80 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 9
Interface options . . . . . . . . . . . . . . . . . . . . . . . 14
The 16 mode interface . . . . . . . . . . . . . . . . . . 14
The 68 mode interface . . . . . . . . . . . . . . . . . . 14
Internal registers. . . . . . . . . . . . . . . . . . . . . . . 15
FIFO operation . . . . . . . . . . . . . . . . . . . . . . . . 15
Hardware flow control . . . . . . . . . . . . . . . . . . . 16
Software flow control . . . . . . . . . . . . . . . . . . . 16
Special feature software flow control . . . . . . . 17
Hardware/software and time-out interrupts. . . 17
Programmable baud rate generator . . . . . . . . 18
DMA operation . . . . . . . . . . . . . . . . . . . . . . . . 19
Sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Loop-back mode . . . . . . . . . . . . . . . . . . . . . . . 19
Transmit (THR) and Receive (RHR)
Interrupt Enable Register (IER) . . . . . . . . . . . 23
IER versus Receive FIFO interrupt
IER versus Receive/Transmit FIFO polled
FIFO Control Register (FCR) . . . . . . . . . . . . . 25
DMA mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Interrupt Status Register (ISR) . . . . . . . . . . . . 27
Line Control Register (LCR) . . . . . . . . . . . . . . 28
Modem Control Register (MCR) . . . . . . . . . . . 30
Line Status Register (LSR) . . . . . . . . . . . . . . . 31
Modem Status Register (MSR). . . . . . . . . . . . 32
Scratchpad Register (SPR) . . . . . . . . . . . . . . 33
Enhanced Feature Register (EFR) . . . . . . . . . 33
SC16C554/554D external reset conditions. . . 35
Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . 38
Holding Registers . . . . . . . . . . . . . . . . . . . . . 23
mode operation . . . . . . . . . . . . . . . . . . . . . . . 24
mode operation . . . . . . . . . . . . . . . . . . . . . . . 24
Document order number: 9397 750 13132
Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder
12
12.1
12.2
12.3
12.4
12.5
13
14
15
16
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Revision history . . . . . . . . . . . . . . . . . . . . . . . 53
Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 54
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Introduction to soldering surface mount
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 50
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 50
Manual soldering . . . . . . . . . . . . . . . . . . . . . . 51
Package related soldering information . . . . . . 51
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
SC16C554/554D