SC28L92A1BS,551 NXP Semiconductors, SC28L92A1BS,551 Datasheet - Page 60
![IC UART DUAL W/FIFO 44PQFP](/photos/6/92/69297/48-hvqfn_sot778-3_pkg_sml.jpg)
SC28L92A1BS,551
Manufacturer Part Number
SC28L92A1BS,551
Description
IC UART DUAL W/FIFO 44PQFP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L92A1B557.pdf
(73 pages)
Specifications of SC28L92A1BS,551
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
16 Byte
Voltage - Supply
3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935281063551
SC28L92A1BS-S
SC28L92A1BS-S
SC28L92A1BS-S
SC28L92A1BS-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC28L92A1BS,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
SC28L92_7
Product data sheet
Fig 14. Interrupt cycle timing (68xxx mode)
Fig 15. Port timing
a. Input pins.
b. Output pins.
D0 to D7
DACKN LOW requires two rising edges of X1 clock after CEN is LOW.
X1/CLK
DACKN
INTRN
IACKN
OP0 to OP6
IP0 to IP6
WRN
RDN
Rev. 07 — 19 December 2007
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
t
CSC
t
PS
t
DD
old data
t
DAL
t
DCR
t
CSD
t
PD
t
PH
t
DAT
t
DF
new data
t
DAH
SC28L92
© NXP B.V. 2007. All rights reserved.
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