SC28L92A1BS,551 NXP Semiconductors, SC28L92A1BS,551 Datasheet - Page 42
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SC28L92A1BS,551
Manufacturer Part Number
SC28L92A1BS,551
Description
IC UART DUAL W/FIFO 44PQFP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L92A1B557.pdf
(73 pages)
Specifications of SC28L92A1BS,551
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
16 Byte
Voltage - Supply
3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935281063551
SC28L92A1BS-S
SC28L92A1BS-S
SC28L92A1BS-S
SC28L92A1BS-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC28L92A1BS,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
SC28L92_7
Product data sheet
7.3.7 Reset Output Port bits Register (ROPR)
Ones in the byte written to the ROPR will cause the corresponding bit positions in the
OPR to set to 0. Zeros have no effect. This allows software to reset individual bits without
keeping a copy of the OPR bit configuration.
Table 48.
Table 49.
Bit
7
6
5
4
3
2
1
0
reset OP7 reset OP6 reset OP5 reset OP4 reset OP3 reset OP2 reset OP1 reset OP0
7
Symbol
-
-
-
-
-
-
-
-
ROPR - Reset output port bits register (address 0xF) bit allocation
ROPR - Reset output port bits register (address 0xF) bit description
6
Description
OPR 7
OPR 6
OPR 5
OPR 4
OPR 3
OPR 2
OPR 1
OPR 0
Rev. 07 — 19 December 2007
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
1 = reset bit
0 = no change
1 = reset bit
0 = no change
1 = reset bit
0 = no change
1 = reset bit
0 = no change
1 = set bit
0 = no change
1 = reset bit
0 = no change
1 = reset bit
0 = no change
1 = reset bit
0 = no change
5
4
3
2
SC28L92
© NXP B.V. 2007. All rights reserved.
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