SC28L92A1BS,551 NXP Semiconductors, SC28L92A1BS,551 Datasheet - Page 4
![IC UART DUAL W/FIFO 44PQFP](/photos/6/92/69297/48-hvqfn_sot778-3_pkg_sml.jpg)
SC28L92A1BS,551
Manufacturer Part Number
SC28L92A1BS,551
Description
IC UART DUAL W/FIFO 44PQFP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L92A1B557.pdf
(73 pages)
Specifications of SC28L92A1BS,551
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
16 Byte
Voltage - Supply
3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935281063551
SC28L92A1BS-S
SC28L92A1BS-S
SC28L92A1BS-S
SC28L92A1BS-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC28L92A1BS,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
4. Block diagram
SC28L92_7
Product data sheet
Fig 1. Block diagram (80xxx mode)
The data pins TxD and RxD are considered idle at the logic 1 (HIGH) level when inactive, or active when at the logic 0
(LOW) level. Comments about these levels when RS232 is referenced often refer to Mark and Space levels. Mark usually
means inactive and Space means active. The voltage levels represented by the terms Mark and Space are often reversed
from those above: Mark is low voltage, and Space is high voltage.
to V
open or connect
CC
for 80xxx
D0 to D7
A0 to A3
X1/CLK
RESET
INTRN
WRN
RDN
CEN
I/M
X2
8
4
SC28L92 (80xxx mode)
R/W CONTROL
BUS BUFFER
GENERATOR
OSCILLATOR
SELECTORS
OPERATION
INTERRUPT
BAUD RATE
COUNTER/
CONTROL
ADDRESS
CONTROL
DECODE
TIMING
CLOCK
TIMER
CSRA
CSRB
XTAL
ACR
CTU
IMR
CTL
ISR
GP
Rev. 07 — 19 December 2007
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
SHIFT REGISTER
SHIFT REGISTER
TRANSMIT FIFO
DETECTORS (4)
SELECT LOGIC
OUTPUT PORT
RECEIVE FIFO
CHANGE-OF-
MRA0, 1, 2, 3
INPUT PORT
WATCHDOG
CHANNEL A
CHANNEL B
(AS ABOVE)
TRANSMIT
FUNCTION
RECEIVE
16-BYTE
16-BYTE
TIMER
STATE
OPCR
IPCR
OPR
CRA
SRA
ACR
002aad459
7
8
TxDA
RxDA
TxDB
RxDB
IP0 to IP6
OP0 to OP7
SC28L92
© NXP B.V. 2007. All rights reserved.
4 of 73