DS3171N+ Maxim Integrated Products, DS3171N+ Datasheet - Page 85

• Manufacturer Part Number: DS3171N+
• Description: TXRX SGL DS3/E3 400PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3171N+

• Function: Single-Chip Transceiver
• Interface: DS3, E3
• Number Of Circuits: 1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 273mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Includes: DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: 90-31710+N00

A FEBE error is generated by forcing the C
inserted one error at a time, or continuously. The FEBE error insertion rate (single or continuous) is programmable.
Each error type (framing, P-bit parity, C-bit parity, or FEBE) has a separate enable. Continuous error insertion
mode inserts errors at every opportunity. Single error insertion mode inserts an error at the next opportunity when
requested. the framing multi-error modes (SEF or OOMF) insert the indicated number of error(s) at the next
opportunities when requested; i.e., a single request will cause multiple errors to be inserted. The requests can be
initiated by a register bit(TSEI) or by the manual error insertion input (TMEI). The error insertion initiation type
(register or input) is programmable. The insertion of each particular error type is individually enabled. Once all error
insertion has been performed, the data stream is passed on to overhead insertion.
10.6.5.4 Transmit C-Bit DS3 Overhead Insertion
Overhead insertion can insert any (or all) of the DS3 overhead bits into the DS3 frame. The DS3 overhead bits X
X
TOHSOF). The P-bits (P
the input bit and the internally generated bit). The DS3 overhead insertion is fully controlled by the transmit
overhead interface. If the transmit overhead data enable signal (TOHEN) is driven high, then the bit on the transmit
overhead signal (TOH) is inserted into the output data stream. Insertion of bits using the TOH signal overwrites
internal overhead insertion.
10.6.5.5 Transmit C-Bit DS3 AIS/Idle Generation
C-bit DS3 AIS/Idle generation overwrites the data stream with AIS or an Idle signal. If transmit Idle is enabled, the
data stream payload is forced to a 1100 pattern with two ones immediately following each DS3 overhead bit. M
M
overwritten with the values one, zero, zero, and one (1001) respectively. X
P
If transmit AIS is enabled, the data stream payload is forced to a 1010 pattern with a one immediately following
each DS3 overhead bit. M
F
are overwritten with 11. P
output DS3 frame. And, C
10.6.5.5.1 Receive C-Bit DS3 Frame Format
The DS3 frame format is shown in
referred to as the far-end SEF/AIS bits). P
are the multiframe alignment bits that define the multiframe boundary. F
define the subframe boundary. Note: Both the M-bits and F-bits define the DS3 frame boundary. C
Application Identification Channel (AIC). C
Far-End Alarm and Control (FEAC) signal. C
are the C-bit parity bits used for path error monitoring. C
used for remote path error monitoring. C
C
10.6.5.5.2 Receive C-Bit DS3 Overhead Extraction
Overhead extraction extracts all of the DS3 overhead bits from the C-bit DS3 frame. All of the DS3 overhead bits
X
P
bit). The C
overhead controller.
X1
2
1
1
1
62
2
, P
, P
, X
, P
, and M
, F
, and C
2,
2
1
2
X2
, P
, P
, C
C
, F
31
1
2
31
, P
, M
, C
3
X3
63
13
, C
bits are overwritten with the values zero, one, and zero (010) respectively. F
, and F
2
are unused, and have a value of one. C
32
bit is sent over to the receive FEAC controller. The C
, M
X
32
, F
, and C
, and C
X
XY
, F
, and C
X4
XY
33
, and C
bits are overwritten with the values one, zero, zero, and one (1001) respectively. X
33
are overwritten with the calculated payload parity from the previous output DS3 frame.
1
1
bits are output as an error indication (modulo 2 addition of the calculated parity and the
X1
, P
1
and P
XY
, M
, C
2,
XY
can be sourced from the transmit overhead interface (TOHCLK, TOH, TOHEN, and
2
X2
C
, and M
are output on the receive overhead interface (ROH, ROHSOF, and ROHCLK). The
31
, and C
2
) and C
, C
32
Figure
, and C
3
X3
bits are overwritten with the values zero, one, and zero (010) respectively.
31
51
(X ≠ 3) are overwritten with 000. AIS will overwrite a transmit Idle signal.
1
12
, C
41
, C
and P
21
, C
10-14. X
is reserved for future network use, and has a value of one. C
33
32
, C
52
, and C
42
are overwritten with the calculated payload parity from the previous
, and C
22
, and C
2
, and C
are the parity bits used for line error monitoring. M
71
1
, C
33
and X
53
85
43
72
bits are received as an error mask (modulo 2 addition of
41
23
are the path maintenance data link (or HDLC) bits. C
, and C
bits in a single multiframe to zero. FEBE error(s) can be
, C
are unused, and have a value of one. C
2
42
are the Remote Defect Indication (RDI) bits (also
, and C
73
51
, C
are unused, and have a value of one.
52
43
, and C
are the Far-End Block Error (FEBE) bits
XY
1
are the subframe alignment bits that
and X
53
bits are sent to the receive HDLC
2
are overwritten with 11. And,
X1
, F
X2
, F
X3
, and F
31
, C
1
, M
32
X4
2
, and C
11
1
, and M
13
bits are
and X
is the
is the
61
33
1
1
2
3
,
,
,