RC28F320J3F75A Micron Technology Inc, RC28F320J3F75A Datasheet - Page 47

• Manufacturer Part Number: RC28F320J3F75A
• Manufacturer: Micron Technology Inc

Specifications of RC28F320J3F75A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Numonyx
11.0
Note:
Table 34: Command Bus Cycles and Command Codes
Jan 2011
208032-03
Program Enhanced Configuration Register
Program OTP Register
Clear Status Register
Program STS Configuration Register
Read Array
Read Status Register
Read Identifier Codes (Read Device Information)
CFI Query
Word/Byte Program
Buffered Program
Block Erase
Program/Erase Suspend
Program/Erase Resume
Set Block Lock Bit
Clear Block Lock Bits
Blank Check
®
Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)
Device Command Codes
For a complete definition on device operations refer to
on page
the convenience.
Some customer applications use illegal or invalid commands (like 0x00) accidentally or
intentionally with the device. An illegal or invalid command caused the device output to
change to Array Read mode on 130nm. On the 65nm device, the output will change to
Read Status Register mode.
After an illegal or invalid command, software may attempt to read the device. If the
illegal command was intentional, software will expect to read array data on 130nm
device, such as 0xFFFF in an unprogrammed location. On the 65nm device, software
may not get the expected array data and instead the status register is read.
Please refer to the legal and valid commands/spec defined in the Datasheet, such as
forread mode, issue 0xFF to Read Array mode, 0x90 to Read Signature, 0x98 to Read
CFI/OTP array mode.
Command
33. The list of all applicable commands are included here one more time for
Device Address
Device Address
Device Address
Device Address
Device Address
Device Address
Device Address
Device Address
Device Address
Device Address
Device Address
Block Address
Block Address
Block Address
Block Address
Address Bus
Register Data
Setup Write Cycle
Data Bus
0040h/
00C0h
00B8h
00B0h
00D0h
00BCh
0060h
0050h
00FFh
0070h
0090h
0098h
0010h
00E8h
0020h
0060h
0060h
Section 8.4, “Device Commands”
Device Address
Device Address
Device Address
Register Offset
Block Address
Block Address
Block Address
Block Address
Address Bus
Register Data
Confirm Write Cycle
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—
—
Register Data
Register Data
Array Data
Data Bus
00D0h
00D0h
00D0h
00D0h
0004h
0001h
Datasheet
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