DS2152L+ Maxim Integrated Products, DS2152L+ Datasheet - Page 57

IC TXRX T1 1CHIP ENHNCD 100-LQFP

DS2152L+

Manufacturer Part Number
DS2152L+
Description
IC TXRX T1 1CHIP ENHNCD 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2152L+

Function
Single-Chip Transceiver
Interface
T1
Number Of Circuits
1
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
*
Includes
DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
12 FDL/FS EXTRACTION AND INSERTION
The DS2152 can extract/insert data from/into the Facility Data Link (FDL) in the ESF framing mode and
from/into Fs-bit position in the D4 framing mode. Because SLC-96 uses the Fs-bit position, this
capability can also be used in SLC-96 applications. The DS2152 contains a complete HDLC and BOC
controller for the FDL. See Section
the DS2152 and earlier devices, the DS2152 maintains some legacy functionality for the FDL (see
Section 12.2). Section
language source code for implementing the FDL on the DS2152.
12.1 HDLC and BOC Controller for the FDL
The DS2152 contains a complete HDLC controller with 16-byte buffers in both the transmit and receive
directions as well as separate dedicated hardware for Bit Oriented Codes (BOC). The HDLC controller
performs all the necessary overhead for generating and receiving Performance Report Messages (PRM)
as described in ANSI T1.403 and the messages as described in AT&T TR54016. The HDLC controller
automatically generates and detects flags, generates and checks the CRC check sum, generates and
detects abort sequences, stuffs and destuffs 0s (for transparency), and byte-aligns to the FDL data stream.
The 16-byte buffers in the HDLC controller are large enough to allow a full PRM to be received or
transmitted without host intervention. The BOC controller will automatically detect incoming BOC
sequences and alert the host. When the BOC ceases, the DS2152 will also alert the host. The user can set
the device up to send any of the possible 6-bit BOC codes.
There are nine registers that the host will use to operate and control the operation of the HDLC and BOC
controllers. A brief description of the registers is shown in
Table 12-1. HDLC/BOC Controller Register List
12.1.1 Status Register for the FDL
Four of the HDLC/BOC controller registers (FDLS, RPRM, RBOC, and TPRM) provide status
information. When a particular event has occurred (or is occurring), the appropriate bit in one of these
four registers will be set to a 1. Some of the bits in these four FDL status registers are latched and some
are real-time bits that are not latched. Section
latched and which are not. With the latched bits, when an event occurs and a bit is set to a 1, it will
remain set until the user reads that bit. The bit will be cleared when it is read and it will not be set again
until the event has occurred again. The real-time bits report the current instantaneous conditions that are
occurring, and the history of these bits is not latched.
FDL Control Register (FDLC)
FDL Status Register (FDLS)
FDL Interrupt Mask Register (FIMR)
Receive PRM Register (RPRM)
Receive BOC Register (RBOC)
Receive FDL FIFO Register (RFFR)
Transmit PRM Register (TPRM)
Transmit BOC Register (TBOC)
Transmit FDL FIFO Register (TFFR)
NAME
12.3
covers D4 and SLC-96 operation. Contact the factory for a copy of C
12.1
for this operation. To allow for backward compatibility between
General control over the HDLC and BOC controllers key
status information for both transmit and receive directions
allows/stops status bits to/from causing an interrupt.
Status information on receive HDLC controller status
information on receive BOC controller access to 16-byte
HDLC FIFO in receive direction.
Status information on transmit HDLC controller
enables/disables transmission of BOC codes access to 16-byte
HDLC FIFO in transmit direction.
12
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contains register descriptions that list which bits are
Table
12-1.
FUNCTION

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