DS2152L+ Maxim Integrated Products, DS2152L+ Datasheet - Page 21

IC TXRX T1 1CHIP ENHNCD 100-LQFP

DS2152L+

Manufacturer Part Number
DS2152L+
Description
IC TXRX T1 1CHIP ENHNCD 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2152L+

Function
Single-Chip Transceiver
Interface
T1
Number Of Circuits
1
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
*
Includes
DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
TCR1: TRANSMIT CONTROL REGISTER 1 (Address = 35 Hex)
Note: For a description of how the bits in TCR1 affect the transmit side formatter, see
LOTCMC
(MSB)
SYMBOL
LOTCMC
TFDLS
TYEL
TCPT
GB7S
TFPT
TSSE
TBL
TFPT
POSITION
TCR1.7
TCR1.6
TCR1.5
TCR1.4
TCR1.3
TCR1.2
TCR1.1
TCR1.0
TCPT
NAME AND DESCRIPTION
Loss Of Transmit Clock Mux Control. Determines whether
the transmit side formatter should switch to the ever present
RCLKO if the TCLK input should fail to transition
(see
0 = do not switch to RCLKO if TCLK stops
1 = switch to RCLKO if TCLK stops
Transmit F-Bit Pass Through. (See note below.)
0 = F bits sourced internally
1 = F bits sampled at TSER
Transmit CRC Pass Through. (See note below.)
0 = source CRC6 bits internally
1 = CRC6 bits sampled at TSER during F-bit time
Software Signaling Insertion Enable. (See note below.)
0 = no signaling is inserted in any channel from the TS1–TS12
registers
1 = signaling is inserted in all channels from the TS1–TS12
registers (the TTR registers can be used to block insertion on a
channel-by-channel basis)
Global Bit 7 Stuffing. (See note below.)
0 = allow the TTR registers to determine which channels
containing all 0s are to be Bit 7 stuffed
1 = force Bit 7 stuffing in all 0-byte channels regardless of how
the TTR registers are programmed
TFDL Register Select. (See note below.)
0 = source FDL or Fs bits from the internal TFDL register
(legacy FDL support mode)
1 = source FDL or Fs bits from the internal HDLC/BOC
controller or the TLINK pin
Transmit Blue Alarm. (See note below.)
0 = transmit data normally
1 = transmit an unframed all 1s code at TPOSO and TNEGO
Transmit Yellow Alarm. (See note below.)
0 = do not transmit yellow alarm
1 = transmit yellow alarm
TSSE
Figure 1-1
21 of 97
for details).
GB7S
Figure
TFDLS
16-11.
TBL
TYEL
(LSB)

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