AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 519
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AT91SAM7X128
Manufacturer Part Number
AT91SAM7X128
Description
MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
Manufacturer
Atmel
Datasheet
1.AT91SAM7X512-AU-999.pdf
(687 pages)
Specifications of AT91SAM7X128
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Ram Size
32 KB
Program Memory Size
128 KB
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Program Memory Type
Flash
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/I2S/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3
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Figure 36-8. Enabling Low-power Mode
36.6.5.2
6120H–ATARM–17-Feb-09
(CAN_MSR3)
(CAN_MSR1)
(CAN_MR)
(CAN_SR)
(CAN_SR)
CAN BUS
WAKEUP
CAN_TIM
SLEEP
MRDY
MRDY
LPM
Disabling Low-power Mode
LPEN= 1
The CAN controller can be awake after detecting a CAN bus activity. Bus activity detection is
done by an external module that may be embedded in the chip. When it is notified of a CAN bus
activity, the software application disables Low-power Mode by programming the CAN controller.
To disable Low-power Mode, the software application must:
The CAN controller synchronizes itself with the bus activity by checking for eleven consecutive
“recessive” bits. Once synchronized, the WAKEUP signal in the CAN_SR register is set.
Depending on the corresponding mask in the CAN_IMR register, an interrupt is generated while
WAKEUP is set. The SLEEP signal in the CAN_SR register is automatically cleared once
WAKEUP is set. WAKEUP signal is automatically cleared once SLEEP is set.
If no message is being sent on the bus, then the CAN controller is able to send a message
eleven bit times after disabling Low-power Mode.
If there is bus activity when Low-power mode is disabled, the CAN controller is synchronized
with the bus activity in the next interframe. The previous message is lost (see
Mailbox 1
– Enable the CAN Controller clock. This is done by programming the Power
– Clear the LPM field in the CAN_MR register
Management Controller (PMC).
AT91SAM7X512/256/128 Preliminary
Arbitration lost
Mailbox 3
0x0
Figure
36-9).
519
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