STA2065N STMicroelectronics, STA2065N Datasheet
STA2065N
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STA2065N Summary of contents
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... V DDIO_ON 1.25 ±3%V ■ TFBGA 372+100 0.65 mm pitch package, packing in tray ■ Ambient temperature range: -40 / +85 °C Table 1. Device summary Qualification Order code grade STA2065N Consumer STA2065P Consumer STA2065A Automotive Doc ID16050 Rev 3 STA2065 Cartesio™ family Data brief : V , DD_ON DD CPU freq ...
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Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STA2065 2.6.5 2.6.6 2.6.7 2.6.8 2.7 Specific functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Introduction 1 Introduction STA2065 is a highly integrated SOC application processor combining host capability with high performance embedded GPS. STA2065 targets vehicle head units and mobile navigation (PND), telematics, infotainment, advanced audio and connectivity systems. The STA2065 provides all the ...
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STA2065 2 System description 2.1 MCU ARM1176-JZF advanced risc machine CPU up to 624 MHz (with Vdd greater or equal to 1.20 V and under process and temperature worst case conditions). 2.2 Embedded memories 2.2.1 Embedded SRAM (eSRAM) The embedded ...
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System description 2.3.6 Real-time clock (RTC) The RTC provides a one second resolution clock. This keeps time when the system is inactive and can be used to wake the system up when a programmed ‘alarm’ time is reached. It has ...
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STA2065 2.4.2 SD/MMC STA2065 features three SD/SDIO/MMC interfaces MHz / 8-bit. The main clock available to the peripherals is: ● PLL2CLK/13 (when PLL2CLK is 624 MHz and SRC_MMC52 = 0, 48 MHz will be generated) ● PLL2CLK/12 ...
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System description 2.5.2 Sample rate converter (SaRaC) This block offers a fully digital stereo asynchronous sample rate conversion, using an automatic Digital Ratio Locked Loop. Its main features are: – 20-bit input and 22-bit output sample size – ...
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STA2065 2.6 Communication interfaces 2.6.1 USB STA2065 embeds two USB2.0 OTG high-speed interfaces named USB0 and USB1, featuring: a) High-speed signalling rate at 480 Mbit/s b) Support for full-speed (12 Mbit/s) signaling bit rate c) Support for session request protocol ...
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System description 2.6.7 AC97 controller AC97 audio controller enables SOC to control external AC97 CODECs using SOC AMBA interconnect implemented in a way to minimize audio data handling by SOC processor with dedicated audio DMA engine. AC97 Audio ...
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STA2065 MHz. The same divisor will be from when the PLL2 is running at 432 MHz, giving an operating frequency in the range from 216 to 27 MHz. The GPS baseband clock will be derived from the ...
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System description 2.7.4 Driving strength and slew rate programmability The IO Driving Strength is programmable for the following interfaces as follows: ● SD/MMC0 ● SD/MMC1 ● SD/MMC2 ● LCD ● DRAM ● FSMC The Slew Rate is also controllable for ...
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STA2065 3 System features introduction In this chapter, an introduction to the main STA2065 system features is given. These will be explained in detail later in this document. 3.1 Power region partition STA2065 is a device targeted to wide range ...
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System features introduction 3.3 Frequency and power range The core voltage range is 1.25 ±4 %V while the IO voltage ranges are 1.8 ±10 %V, 2.5 ± and 3.3 ± 10 %V. Table 2 shows some power use ...
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STA2065 3.4 Power states The following power states are defined: ● OFF: V dd_on retention is kept in the SDRAM ● NORMAL: Each peripheral runs at its nominal speed with the possibility of turning off all the unused peripherals (peripheral ...
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System features introduction Table 3. Power mode states (continued) Power State 32 kHz OFF off NORMAL on DEEP-SLEEP on off BACKUP on off 3.5 System wakeup and power down Typically the system using STA2065 will never be powered off, even ...
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STA2065 3.6 IO groups V is split into the following groups: ddio (a) ● V ddio_on ● V (This is split into 5 types: V ddiox ● V (USB 2.0 PHY transceiver) USB The IO supply type and corresponding pads ...
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Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ...
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STA2065 5 Revision history Table 4. Document revision history Date 23-Jul-2009 13-Oct-2009 19-Oct-2009 Revision 1 Initial release. 2 Updated features list on page 1. throughput 3 Updated “High Doc ID16050 Rev 3 Revision history Changes interfaces” feature on cover page. ...
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... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...