NUC130LE3CN Nuvoton Technology Corporation of America, NUC130LE3CN Datasheet - Page 375

• Manufacturer Part Number: NUC130LE3CN
• Description: IC MCU 32BIT 128KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130LE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.13.6.2 Message Handler State Machine
5.13.6.2.1 Data Transfer from/to Message RAM
machine of the CAN_Core and the state machine of the Message Handler control the internal
data flow of the C_CAN. Received messages that pass the acceptance filtering are stored into
the Message RAM, messages with pending transmission request are loaded into the
CAN_Core’s Shift Register and are transmitted through the CAN bus.
The application software reads received messages and updates messages to be transmitted
through the IFn Interface Registers. Depending on the configuration, the application software is
interrupted on certain CAN message and CAN error events.
The Message Handler controls the data transfer between the Rx/Tx Shift Register of the CAN
Core, the Message RAM and the IFn Registers.
The Message Handler FSM controls the following functions:
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When the application software initiates a data transfer between the IFn Registers and Message
RAM, the Message Handler sets the Busy bit in the respective Command Request Register
(CAN_IFn_CRR) to ‘1’. After the transfer has completed, the Busy bit is again cleared (see Figure
5-81).
The respective Command Mask Register specifies whether a complete Message Object or only
parts of it will be transferred. Due to the structure of the Message RAM, it is not possible to write
single bits/bytes of one Message Object. It is always necessary to write a complete Message
Object into the Message RAM. Therefore, the data transfer from the IFn Registers to the Message
RAM requires a read-modify-write cycle. First, those parts of the Message Object that are not to
be changed are read from the Message RAM and then the complete contents of the Message
Buffer Registers are written into the Message Object.
Data Transfer from IFn Registers to the Message RAM
Data Transfer from Message RAM to the IFn Registers
Data Transfer from Shift Register to the Message RAM
Data Transfer from Message RAM to Shift Register
Data Transfer from Shift Register to the Acceptance Filtering unit
Scanning of Message RAM for a matching Message Object
Handling of TxRqst flags
Handling of interrupts.
NuMicro™ NUC130/NUC140 Technical Reference Manual
- 375 -
Publication Release Date: June 14, 2011
Revision V2.01