NUC130LE3CN Nuvoton Technology Corporation of America, NUC130LE3CN Datasheet - Page 186

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NUC130LE3CN

Manufacturer Part Number
NUC130LE3CN
Description
IC MCU 32BIT 128KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™ NUC100r
Datasheets

Specifications of NUC130LE3CN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NUC130LE3CN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Part Number:
NUC130LE3CN
Manufacturer:
NUVOTON
Quantity:
20 000
GPIO Port [A/B/C/D/E] Data Output Write Mask (GPIOx _DMASK)
Register
GPIOA_DMASK GP_BA+0x00C
GPIOB_DMASK GP_BA+0x04C
GPIOC_DMASK GP_BA+0x08C
GPIOD_DMASK GP_BA+0x0CC R/W
GPIOE_DMASK GP_BA+0x10C
Bits
[31:16]
[n]
31
23
15
7
NuMicro™ NUC130/NUC140 Technical Reference Manual
Offset
Descriptions
Reserved
DMASK[n]
30
22
14
6
R/W
R/W
R/W
R/W
R/W
Reserved
Port [A/B/C/D/E] Data Output Write Mask
These bits are used to protect the corresponding register of GPIOx_DOUT bit[n].
When set the DMASK bit[n] to 1, the corresponding GPIOx_DOUT[n] bit is protected.
The write signal is masked, write data to the protect bit is ignored
1 = The corresponding GPIOx_DOUT[n] bit is protected
0 = The corresponding GPIOx_DOUT[n] bit can be updated
Note: This function only protect corresponding GPIOx_DOUT[n] bit, and will not
protect
GPIOCx_DOUT, GPIODx_DOUT, GPIOEx_DOUT).
29
21
13
5
Description
GPIO Port A Data Output Write Mask
GPIO Port B Data Output Write Mask
GPIO Port C Data Output Write Mask
GPIO Port D Data Output Write Mask
GPIO Port E Data Output Write Mask
corresponding
28
20
12
4
DMASK[15:8]
- 186 -
DMASK[7:0]
Reserved
Reserved
bit
control
27
19
11
3
Publication Release Date: June 14, 2011
register
26
18
10
2
(GPIOAx_DOUT,
25
17
9
1
Revision V2.01
GPIOBx_DOUT,
Reset Value
0xXXXX_0000
0xXXXX_0000
0xXXXX_0000
0xXXXX_0000
0xXXXX_0000
24
16
8
0

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