NUC130LE3CN Nuvoton Technology Corporation of America, NUC130LE3CN Datasheet - Page 304

• Manufacturer Part Number: NUC130LE3CN
• Description: IC MCU 32BIT 128KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130LE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

SPI Control and Status Register 2 (SPI_CNTRL2)
Register
SPI_CNTRL2 SPIx_BA+0x3C
Bits
[31:12]
[11]
[10]
[9]
31
23
15
7
NuMicro™ NUC130/NUC140 Technical Reference Manual
Offset
Descriptions
Reserved
SLV_START_INTSTS
SSTA_INTEN
SLV_ABORT
30
22
14
6
Reserved
R/W
R/W
29
21
13
5
Description
The second Control and Status Register
Slave Start Interrupt Status
It is used to dedicate that the transfer has start in slave mode with no slave
select.
1 = It indicates that the transfer start in slave mode with no slave select. It is
0 = It indicates that the slave start transfer no active.
Slave Start Interrupt Enable
It is used to enable interrupt when the transfer has start in slave mode with no
slave select. If there is no transfer done interrupt over the time period which is
defined by user after the transfer start, the user can set the SLV_ABORT bit to
force the transfer done.
1 = Enable the transaction start interrupt. It is clear by the current transfer
0 = Disable the transfer start interrupt.
Abort in Slave Mode with No Slave Select
In normal operation, there is interrupt event when the received data meet the
required bits which define in TX_BIT_LEN and TX_NUM.
If the received bits are less than the requirement and there is no more serial
clock input over the one transfer time in slave mode with no slave select, the
user can set this bit to force the current transfer done and then the user can
get a transfer done interrupt event.
Reserved
Note: It is auto clear to 0 by hardware when the abort event is active.
auto clear by transfer done or writing one clear.
done or the SLV_START_INTSTS bit be clear (write one clear).
Reserved
28
20
12
4
- 304 -
Reserved
Reserved
SLV_START
_INTSTS
27
19
11
3
Publication Release Date: June 14, 2011
SSTA_INT
EN
26
18
10
2
SLV_ABORT
25
17
9
1
Revision V2.01
Reset Value
0x0000_0000
NOSLVSEL
DIV_ONE
24
16
8
0