LPC4310FET100,551 NXP Semiconductors, LPC4310FET100,551 Datasheet - Page 29
LPC4310FET100,551
Manufacturer Part Number
LPC4310FET100,551
Description
IC MCU 32BIT 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC43xxr
Datasheet
1.LPC4310FET100551.pdf
(145 pages)
Specifications of LPC4310FET100,551
Core Processor
ARM® Cortex™-M4/M0
Core Size
32-Bit Dual-Core
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
168K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC4310FET100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC4350_30_20_10
Objective data sheet
Symbol
P6_2
P6_3
P6_4
Pin description
L13
P15
R16
x
x
x
…continued
J9
-
F6
111 78
113 79
114 80
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 23 September 2011
-
-
53
[3]
[3]
[3]
I; PU I/O GPIO3[1] — General purpose digital input/output pin.
I; PU I/O GPIO3[2] — General purpose digital input/output pin.
I; PU I/O GPIO3[3] — General purpose digital input/output pin.
O
I/O U0_DIR — RS-485/EIA-485 output enable/direction
I/O I2S0_RX_SDA — I2S Receive data. It is driven by
-
I
-
-
O
I/O SGPIO4 — General purpose digital input/output pin.
O
-
I
-
-
I
O
O
-
-
-
-
Description
EMC_CKEOUT1 — SDRAM clock enable 1.
control for USART0.
the transmitter and read by the receiver. Corresponds
to the signal SD in the I
R — Function reserved.
T2_CAP1 — Capture input 1 of timer 2.
R — Function reserved.
R — Function reserved.
USB0_PWR_EN — VBUS drive signal (towards
external charge pump or power management unit);
indicates that the VBUS signal must be driven (active
HIGH).
EMC_CS1 — LOW active Chip Select 1 signal.
R — Function reserved.
T2_CAP2 — Capture input 2 of timer 2.
R — Function reserved.
R — Function reserved.
CTIN_6 — SCT input 6. Capture input 1 of timer 3.
U0_TXD — Transmitter output for USART0.
EMC_CAS — LOW active SDRAM Column Address
Strobe.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
32-bit ARM Cortex-M4/M0 microcontroller
Table
LPC4350/30/20/10
2.
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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