LPC4310FET100,551 NXP Semiconductors, LPC4310FET100,551 Datasheet - Page 18
LPC4310FET100,551
Manufacturer Part Number
LPC4310FET100,551
Description
IC MCU 32BIT 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC43xxr
Datasheet
1.LPC4310FET100551.pdf
(145 pages)
Specifications of LPC4310FET100,551
Core Processor
ARM® Cortex™-M4/M0
Core Size
32-Bit Dual-Core
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
168K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC4310FET100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC4350_30_20_10
Objective data sheet
Symbol
P2_7
P2_8
P2_9
P2_10
Pin description
H14
J16
H16
G16
x
x
x
x
…continued
C10 138 96
C6
B10 144 102 70
E8
140 98
146 104 71
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 23 September 2011
65
67
[3]
[3]
[3]
[3]
I; PU I/O GPIO0[7] — General purpose digital input/output pin.
I; PU I/O SGPIO15 — General purpose digital input/output pin.
I; PU I/O GPIO1[10] — General purpose digital input/output
I; PU I/O GPIO0[14] — General purpose digital input/output
O
I/O U3_UCLK — Serial clock input/output for USART3 in
I/O EMC_A9 — External memory address line 9.
-
-
O
-
O
I/O U3_DIR — RS-485/EIA-485 output enable/direction
I/O EMC_A8 — External memory address line 8.
I/O GPIO5[7] — General purpose digital input/output pin.
-
-
-
O
I/O U3_BAUD — <tbd> for USART3.
I/O EMC_A0 — External memory address line 0.
-
-
-
-
O
O
I/O EMC_A1 — External memory address line 1.
-
-
-
-
Description
If this pin is pulled LOW at reset, the part enters ISP
mode using USART0.
CTOUT_1 — SCT output 1. Match output 1 of timer 0.
synchronous mode.
R — Function reserved.
R — Function reserved.
T3_MAT3 — Match output 3 of timer 3.
R — Function reserved.
Boot pin (see
CTOUT_0 — SCT output 0. Match output 0 of timer 0.
control for USART3.
R — Function reserved.
R — Function reserved.
R — Function reserved.
pin. Boot pin (see
CTOUT_3 — SCT output 3. Match output 3 of timer 0.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
pin.
CTOUT_2 — SCT output 2. Match output 2 of timer 0.
U2_TXD — Transmitter output for USART2.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
32-bit ARM Cortex-M4/M0 microcontroller
Table
LPC4350/30/20/10
2.
Table
Table
5).
5).
© NXP B.V. 2011. All rights reserved.
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