MT90870AG Zarlink, MT90870AG Datasheet - Page 57

• Manufacturer Part Number: MT90870AG
• Description: Switch Fabric 12K x 12K/8K x 4K 1.8V/3.3V 272-Pin BGA Tray
• Manufacturer: Zarlink

Specifications of MT90870AG

• Package: 272BGA
• Number Of Ports: 32
• Fabric Size: 12K x 12K|8K x 4K
• Switch Core: Non-Blocking|Blocking
• Port Speed: 2.048|4.096|8.192|16.384 Mbps
• Operating Supply Voltage: 1.8|3.3 V

13.4
Address 0003h to 0012h.
Sixteen Local input channel delay registers (LCDR0 to LCDR15) allow users to program the input channel delay for
the Local input data streams LSTi0-15. The possible adjustment is 255 channels and the LCDR0 to LCDR15
registers are configured as follows:
13.4.1
These eight bits define the delay, in channel numbers, the serial interface receiver takes to store the channel data
from the Local stream input pins. The input channel delay can be set to 255 (16 Mb/s streams), 127 (8 Mb/s
streams), 63 (4 Mb/s streams) or 31 (2 Mb/s streams) from the frame boundary.
(where n = 0 to
LCDRn Bit
15-8
7-0
15)
Local Input Channel Delay Registers (LCDR0 to LCDR15)
Local Channel Delay Bits 7-0 (LCD7 - LCD0)
Reserved
LCD(7:0)
Name
Table 20 - Local Input Channel Delay Programming Table
Table 19 - Local Channel Delay Register (LCDRn) Bits
0 Channel (Default)
Channel Delay
Input Stream
253 Channels
254 Channels
255 Channels
2 Channels
3 Channels
4 Channels
5 Channels
1 Channel
Reset
...
...
0
0
Zarlink Semiconductor Inc.
Reserved
Local Channel Delay Register
The binary value of these bits refers to the channel delay value
for the Local input stream.
MT90870
57
Corresponding
LCD7-LCD0
Delay Bits
0000 0000
0000 0001
0000 0010
0000 0011
0000 0100
0000 0101
1111 1101
1111 1110
1111 1111
...
...
Description
Data Sheet
: