MT90870AG Zarlink, MT90870AG Datasheet - Page 17

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MT90870AG

Manufacturer Part Number
MT90870AG
Description
Switch Fabric 12K x 12K/8K x 4K 1.8V/3.3V 272-Pin BGA Tray
Manufacturer
Zarlink
Datasheet

Specifications of MT90870AG

Package
272BGA
Number Of Ports
32
Fabric Size
12K x 12K|8K x 4K
Switch Core
Non-Blocking|Blocking
Port Speed
2.048|4.096|8.192|16.384 Mbps
Operating Supply Voltage
1.8|3.3 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT90870AG2
Manufacturer:
ZARLINK
Quantity:
41
Pin Description (continued)
BORS
LORS
NC
IC
Name
K19
A16, B16,
Y12, Y13
B17, C3, C9, D16,
U2, U3, V2, V3,
V11, V12, V15,
V16, W10, W11,
W15, W16, W17,
W20, Y3, Y10,
Y15, Y16,
T18, T19, T20,
U18, U19, U20,
V17, V18, V19,
V20, W18, W19,
Y20, Y17, Y18,
Y19,
F18, F19, F20,
G17, G18, G19,
G20, H18, H19,
H20, J17, J18,
J19, J20, K17,
K18
K2
A2, A20, B6, B10,
Coordinates
Package
Backplane Output Reset State (5 V Tolerant, Internal pull-down).
When this input is LOW the device will initialize with the BSTo0-31 outputs
driven high, and the BCSTo0-3 outputs driven low. Following initialization,
the Backplane stream outputs are always active and a high impedance
state, if required on a per-channel basis, may be implemented with
external buffers controlled by outputs BCSTo0-3.
When this input is HIGH, the device will initialize with the BSTo0-31
outputs at high impedance and the BCSTo0-3 outputs driven low.
Following initialization, the Backplane stream outputs may be set active or
high impedance using the ODE pin, or on a per-channel basis with the BE
bit of the Backplane Connection Memory.
Local Output Reset State (5 V Tolerant, Internal pull-down).
When this input is LOW, the device will initialize with the LSTo0-15
outputs driven high and the LCSTo0-1 outputs driven low. Following
initialization, the Local stream outputs are always active and a high
impedance state, if required on a per-channel basis, may be implemented
with external buffers controlled by the LCSTo0-1 outputs.
When this input is HIGH, the device will initialize with the LSTo0-15
outputs at high impedance and the LCSTo0-1 outputs driven low.
Following initialization, the Local stream outputs may be set active or high
impedance using the ODE pin, or on a per-channel basis with the LE bit
of the Local Connection Memory.
No Connect.
No connection to be made.
Internal Connects
These inputs MUST be held LOW.
Zarlink Semiconductor Inc.
MT90870
17
Description
Data Sheet

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