PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 70

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

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2.0 Device Architecture and Configuration
2.19.10 X-Bus Memory Base Address Low Byte Register
This register describes the low byte for the user-defined memory zone mapped to the X-Bus (decoded as bits 23 to 16 of
the 32-bit address range; bits 15 to 0 are 0). This register is reset by hardware to 00h.
Location:
Type:
2.19.11 X-Bus Memory Size Configuration Register
This register defines the size of the user-defined memory zone mapped to the X-Bus. This register is reset by hardware to
00h.
Location:
Type:
Bit
Name
Reset
Bit
Name
Reset
7-0
7-4
3-0
Bit
Bit
User-Defined Memory Zone Address Low. Defines the lower 8 bits of the user-defined memory block base
address. The base address should be aligned on the selected block size.
Reserved
User-Defined Memory Zone Size. Defines the size in bytes of the zone window. The size is defined as a power
of two using the equation: NumOfBytes = 2
aligned to the window size (i.e., for a 128 Kbyte window, the 17 LSBs of the address should be zero.
Bits
3 2 1 0
0 0 0 0
. . .
1 0 0 0
Other
Index F6h
R/W
Index F7h
R/W
Size (Bytes)
64K (default)
16M
Reserved
7
0
7
0
6
0
6
0
Reserved
User-Defined Memory Zone Address Low
5
0
5
0
n
(User-Defined Memory Zone size+16). The zone must always be
Description
Description
70
4
0
4
0
(Continued)
3
0
3
0
User-Defined Memory Zone Size
2
0
2
0
1
0
1
0
0
0
0
0