PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 29

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

2.0 Device Architecture and Configuration
2.2.3
In the registers below, any undefined bit is reserved. Unless otherwise noted, the following definitions also hold true:
Note: When the X-Bus Extension is disabled, access to its registers (not the PnP registers) is disabled, but all bridging func-
tions continue to operate according to its register settings.
All registers are read/write.
All reserved bits return 0 on reads, except where noted otherwise. To prevent unpredictable results, do not modify
these bits. Use read-modify-write to prevent the values of reserved bits from being changed during write.
Write only registers should not use read-modify-write during updates.
20h - 2Fh
Index
Index
Index
07h
30h
60h
61h
Standard Logical Device Configuration Register Definitions
Address Bits (15-8)
Address Bits (7-0)
Register Name
Register Name
Register Name
Logical Device
Configuration
I/O Port Base
I/O Port Base
Descriptor 0
Descriptor 0
SuperI/O
Number
Activate
This register selects the current logical device. See Table 6 for valid numbers. All
other values are reserved.
SuperI/O configuration registers and ID registers
Bit 0 - Logical device activation control
Bits 7-1 - Reserved
Indicates selected I/O lower limit address bits 15-8 for I/O Descriptor 0.
Indicates selected I/O lower limit address bits 7-0 for I/O Descriptor 0.
Table 9. I/O Space Configuration Registers
Table 8. Logical Device Activate Register
0: Disabled
1: Enabled
Table 7. Standard Control Registers
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Description
Description
Description
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