PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 103

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

6.0 Musical Instrument Digital Interface (MIDI) Port
6.3.4
This read register provides status information regarding the functional blocks of the MIDI Port.
Location:
Type:
6.3.5
This write register is a port via which commands are issued by the host to the MIDI Port.
Location:
Type:
Bit
Name
Reset
Bit
Name
Reset
1-0
Bit
7
6
5
4
3
2
MIDI Status Register (MSTAT)
MIDI Command Register (MCOM)
Rx Buffer Empty. When set to 1, it indicates that the Receive Buffer in Pass-Thru mode, or the FIFO in UART
mode, is empty. When set to 0, it indicates that the Receive Buffer or FIFO contain data that can be read via the
MDI register.
0: Not empty
1: Empty (default)
Tx Buffer Full. When set to 1, it indicates that the Transmit Buffer or FIFO cannot accept any more data. When
set to 0, it indicates that the Transmit Buffer or FIFO can accept more data written to the MDO register.
0: Not full (default)
1: Full
Rx FIFO Full. When set to 1, it indicates that the Receive FIFO cannot accept any more received data bytes.
When set to 0, it indicates that the Receive FIFO can accept more received data bytes. This bit is forced to 0
when the FIFOs are disabled.
0: Not full or disabled (default)
1: Full
MIDI Port Operation Mode. When set to 1, it indicates that the MIDI Port is currently operating in UART mode.
When set to 0, it indicates that the MIDI Port is currently operating in Pass-Thru (non-UART) mode.
0: Pass-Thru mode (default)
1: UART mode
Rx Overrun Error. This bit is cleared to 0 when the MSTAT register is read. An overrun error is defined as the
state in which one or more data bytes have been received by the MIDI Port while the Receive Buffer, or FIFO,
was full.
0: No overrun error (default)
1: Overrun error
Tx FIFO Not Empty. This bit is forced to 0 when the FIFOs are disabled.
0: Empty or disabled (default)
1: Not empty
Reserved
Offset 01h
R
Offset 01h
W
Rx Buffer
Empty
X
7
1
7
Tx Buffer
Full
X
6
0
6
Rx FIFO
Full
X
5
0
5
Operation
MIDI Port
Mode
103
Description
Command Byte
4
0
4
X
Rx Overrun
Error
(Continued)
X
3
0
3
Tx FIFO Not
Empty
X
2
0
2
X
1
0
1
Reserved
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X
0
0
0