P80C592FFA NXP Semiconductors, P80C592FFA Datasheet - Page 7

• Manufacturer Part Number: P80C592FFA
• Manufacturer: NXP Semiconductors

Specifications of P80C592FFA

• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: CAN/UART
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
Table 1 Pin description for single function pins (SOT188-2; see note 1)
Notes
1. To avoid a ‘latch up’ effect at power-on: V
2. Triggered by a rising edge. ADC operation can also be started by software.
3. RST also provides a reset pulse as output when timer T3 overflows or after a CAN wake-up from Power-down.
4. ALE is activated every six oscillator periods. During an external data memory access one ALE pulse is skipped.
5. See Section 7.1, Table 3 for EA operation. For P83Cxxx microcontrollers specified with the option ‘ROM-code
1996 Jun 27
V
STADC
PWM0
PMW1
EW
RST
CV
XTAL2
XTAL1
V
PSEN
ALE
EA
REF
CRX1
CRX0
AV
AV
AV
AV
SYMBOL PIN
DD
SS
8-bit microcontroller with on-chip CAN
REF
REF+
SS
DD
protection’, the EA pin is latched during reset and is ‘don't care’ after reset, regardless of whether the ROM-code
protection is selected or not.
SS
15
22
33
34
35
44
45
46
55
56
57
58
59
60
61
2
3
4
5
6
Power supply, digital part (+5 V). For normal operation and power reduced modes.
Start ADC operation. Input starting analog-to-digital conversion (note 2). This pin must not float.
Pulse width modulation output 0.
Pulse width modulation output 1.
Enable Watchdog Timer (WDT): enable for T3 Watchdog Timer and disable Power-down mode.
This pin must not float.
Reset: input to reset the P8xC592 (note 3).
CAN ground potential for the CAN transmitter outputs.
Crystal pin 2: output of the inverting amplifier that forms the oscillator.
When an external clock oscillator is used this pin is left open-circuit.
Crystal pin 1: input to the inverting amplifier that forms the oscillator, and input to the internal clock
generator. Receives the external clock oscillator signal, when an external oscillator is used.
Ground, digital part.
Program Store Enable: Read strobe to external Program Memory (active LOW).
Drive: 8
Address Latch Enable: latches the Low-byte of the address during accesses to external memory
(note 4). Drive: 8
External Access input. See note 5.
1
Inputs from the CAN-bus line to the differential input comparator of the on-chip CAN-controller
(note 7).
Low-end of ADC (analog-to-digital) conversion reference resistor.
High-end of ADC (analog-to-digital) conversion reference resistor (note 8).
Ground, analog part. For ADC, CAN receiver and reference voltage.
Power supply, analog part (+5 V). For ADC, CAN receiver and reference voltage.
2
AV
DD
reference voltage output respectively input (note 6).
LSTTL inputs.
LSTTL inputs; handles CMOS inputs without an external pull-up.
SS
0.5 V < ‘voltage on any pin at any time’ < V
7
DESCRIPTION
DD
+ 0.5 V.
Product specification
P8xC592