CYNSE70064A-50BGC Cypress Semiconductor Corp, CYNSE70064A-50BGC Datasheet - Page 18

• Manufacturer Part Number: CYNSE70064A-50BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70064A-50BGC

• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

The CYNSE70064A device can be configured to contain tables of different widths, even within the same chip. Figure 8-2 shows
a sample configuration of different widths.
9.0
Figure 9-1 shows CYNSE70064A data and mask array addressing.
10.0
A master device such as an ASIC controller issues commands to the CYNSE70064A device using the command valid (CMDV)
signal and the CMD bus. The following subsections describe the operation of the commands.
10.1
The CYNSE70064A implements four basic commands, shown in Table 10-1. The command code must be presented to CMD[1:0]
while keeping the CMDV signal HIGH for two CLK2X cycles (designated as cycles A and B). The controller ASIC must align the
instructions using the PHS_L signal. The CMD[8:2] field passes the parameters of the command in cycles A and B.
Table 10-1. Command Codes
Document #: 38-02041 Rev. *F
Command Code
Command Codes
Data and Mask Addressing
Commands
00
01
10
11
32K
(68-bit configuration)
CFG = 00000000
67
Command
Figure 9-1. Addressing of the CYNSE70064A Data and Mask Arrays
32767
Search
68
Learn
Read
Write
0
1
2
3
Figure 8-2. Multiwidth Database Configurations Example
0
8K
Writes one of the following: data array, mask array, device registers, or external SRAM.
Searches the data array for a desired pattern using the specified register from the GMR
array and local mask associated with each data cell.
The device has internal storage for up to 16 comparands that it can learn. The device
controller can insert these entries at the next-free address (as specified by the NFA
register) using the Learn instruction.
Reads one of the following: data array, mask array, device registers, or external SRAM.
271
32764
68
0
4
8 K
8 K
4 K
2 K
(272-bit configuration)
CFG = 10101010
32765
68
1
5
136
CFG = 10010000
68
68
32766
68
272
2
6
32767
68
3
7
Description
0
(136-bit configuration)
16K
CFG = 01010101
135
32766 32767
68
0
2
4
6
68
1
3
5
7
CYNSE70064A
0
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