PCF8576DT NXP Semiconductors, PCF8576DT Datasheet - Page 24

PCF8576DT

Manufacturer Part Number
PCF8576DT
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF8576DT

Operating Supply Voltage (typ)
2.5/3.3/5V
Number Of Digits
20
Number Of Segments
160
Package Type
TSSOP
Pin Count
56
Mounting
Surface Mount
Power Dissipation
400mW
Frequency (max)
400KHz
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (max)
5.5V
Lead Free Status / Rohs Status
Supplier Unconfirmed

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NXP Semiconductors
PCF8576D_9
Product data sheet
The I
condition (S) from the I
slave addresses available. All PCF8576Ds whose SA0 inputs correspond to bit 0 of the
slave address respond by asserting an acknowledge in parallel. This I
ignored by all PCF8576Ds whose SA0 inputs are set to the alternative level.
After an acknowledgement, one or more command bytes follow, that define the status of
each addressed PCF8576D.
The last command byte sent is identified by resetting its most significant bit, continuation
bit C, (see
PCF8576D on the bus.
After the last command byte, one or more display data bytes may follow. Display data
bytes are stored in the display RAM at the address specified by the data pointer and the
subaddress counter. Both data pointer and subaddress counter are automatically updated
and the data directed to the intended PCF8576D device.
An acknowledgement after each byte is asserted only by the PCF8576Ds that are
addressed via address lines A0, A1 and A2. After the last display byte, the I
asserts a STOP condition (P). Alternately a START may be asserted to restart an I
access.
Fig 17. I
Fig 18. Format of command byte
2
C-bus protocol is shown in
2
S
Figure
C-bus protocol
0 1 1 1 0 0
slave address
18). The command bytes are also acknowledged by all addressed
1 byte
Rev. 09 — 25 August 2009
2
C-bus master which is followed by one of two possible PCF8576D
S
A
0
R/W
MSB
0 A C
C
Figure
acknowledge by
all addressed
PCF8576Ds
n
COMMAND
REST OF OPCODE
1 byte(s)
17. The sequence is initiated with a START
Universal LCD driver for low multiplex rates
A
msa833
DISPLAY DATA
n
LSB
0 byte(s)
by A0, A1 and A2
update data pointers
subaddress counter
PCF8576D only
PCF8576D
and if necessary,
acknowledge
selected
2
C-bus transfer is
© NXP B.V. 2009. All rights reserved.
A
P
2
mdb078
C-bus master
2
24 of 52
C-bus

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