NOII4SM6600A-QDC ON Semiconductor, NOII4SM6600A-QDC Datasheet - Page 17

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NOII4SM6600A-QDC

Manufacturer Part Number
NOII4SM6600A-QDC
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of NOII4SM6600A-QDC

Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 10. NDR: Advantages and Disadvantages
Sequencer and Registers
Figure 4
needed to operate the sensor in a particular sub sampling mode,
with a certain integration time, output amplifier gain, and more.
Most of these signals are generated on-chip by the sequencer
that uses only a few control signals. These control signals must
be generated by the external system:
Table 11. List of Internal Registers
Low Noise, because it is true CDS. In the order of 10 e- or below. System memory required to record the reset level and the
High Sensitivity, because the conversion capacitance is kept rather
low.
High Dynamic Range, because the results include signals for short
and long integrations times.
0 (0000)
1 (0001)
SYS_CLOCK, which defines the pixel rate (nominal 40 MHz),
Y_START pulse, which indicates the start of a new frame,
Y_CLOCK, which selects a new row and starts the row blanking
sequence, including the synchronization and loading of the
X-register.
Register
on page 7 showed several control signals that are
0
1:2
3
4
5
6
7
8
9
10
11
11:0
10:0
Bit
SEQUENCER
register
NDR
NDR_mode
RESET_BLACK
FAST_RESET
FRAME_CAL_MODE 0 = fast
LINE_CAL_MODE
CONT_CHARGE
GRAN_X_SEQ_LSB Granularity of the X sequencer clock
GRAN_X_SEQ_MSB
BLACK
RESET_ALL
NROF_PIXELS
Advantages
Name
Selection of mode, granularity of the X sequencer clock, calibration,
Default value <11:0>:"000100000000"
Mode of readout:
NDR = 0: normal readout (double sampling)
NDR = 1: non-destructive readout
4 different modes of nondestructive readout (no influence if NDR = 0)
0 = normal operation
1 = reset of pixels before readout
0 = electronic shutter operation
1 = addressing from both sides
1 = slow
0 = fast
1 = slow
0 = normal mode
1 = continuous precharge
0 = normal mode
1 = disconnects column amplifiers from buses, output of amplifier equals dark
reference level
0 = normal mode
1 = continuous reset of all pixels
Number of pixels to count (X direction). Max. 2222/2 (2210 real + 12 dummy pixels).
Default value <10:0>:"01000000000"
Rev. 9 | www.onsemi.com | Page 17 of 32
intermediate samples.
Requires multiples readings of each pixel, thus higher data
throughput.
Requires system level digital calculations.
The relative position of the internal pulses is determined by a
number of data bits that are uploaded in internal registers
through a Serial to Parallel interface (SPI).
Internal Registers
Table 11
registers are discussed in more detail in the following sections.
On power-on, all the internal register of the IBIS4-6600 are reset
to 0. All the sensor registers must to be loaded before the sensor
is brought out of reset.
lists the internal registers with a short description. The
Description
Disadvantages
NOII4SM6600A

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