ADC10DL065EVAL National Semiconductor, ADC10DL065EVAL Datasheet

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ADC10DL065EVAL

Manufacturer Part Number
ADC10DL065EVAL
Description
Manufacturer
National Semiconductor
Datasheet
1.ADC10DL065EVAL.pdf (26 pages)

Specifications of ADC10DL065EVAL

Lead Free Status / Rohs Status
Not Compliant
© 2006 National Semiconductor Corporation
ADC10DL065
Dual 10-Bit, 65 MSPS, 3.3V, 370mW A/D Converter
General Description
The ADC10DL065 is a dual, low power monolithic CMOS
analog-to-digital converter capable of converting analog in-
put signals into 10-bit digital words at 65 Megasamples per
second (MSPS). This converter uses a differential, pipeline
architecture with digital error correction and an on-chip
sample-and-hold circuit to minimize power consumption
while providing excellent dynamic performance and a 250
MHz Full Power Bandwidth. Operating on a single +3.3V
power supply, the ADC10DL065 achieves 9.8 effective bits
at nyquist and consumes just 370 mW at 65 MSPS, including
the reference current. The Power Down feature reduces
power consumption to 36 mW.
The differential inputs provide a full scale differential input
swing equal to 2 times V
ended input. Full use of the differential input is recom-
mended for optimum performance. The digital outputs from
the two ADC’s are available on a single multiplexed 10-bit
bus or on separate buses. Duty cycle stabilization and output
data format are selectable using a quad state function pin.
The output data can be set for offset binary or two’s comple-
ment.
To ease interfacing to lower voltage systems, the digital
output driver power pins of the ADC10DL065 can be con-
nected to a separate supply voltage in the range of 2.4V to
the analog supply voltage. This device is available in the
64-lead TQFP package and will operate over the industrial
temperature range of −40˚C to +85˚C. An evaluation board is
available to ease the evaluation process.
Connection Diagram
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
REF
with the possibility of a single-
DS201486
Features
n Single +3.3V supply operation
n Internal sample-and-hold
n Internal reference
n Outputs 2.4V to 3.6V compatible
n Power down mode
n Duty Cycle Stabilizer
n Multiplexed Output Mode
Key Specifications
n Resolution
n DNL
n SNR (f
n SFDR (f
n Data Latency
n Power Consumption
n -- Operating
n -- Power Down Mode
Applications
n Ultrasound and Imaging
n Instrumentation
n Communications Receivers
n Sonar/Radar
n xDSL
n DSP Front Ends
IN
IN
= 10 MHz)
= 10 MHz)
20148601
±
7 Clock Cycles
0.16 LSB (typ)
370 mW (typ)
www.national.com
36 mW (typ)
61 dB (typ)
85 dB (typ)
June 2006
10 Bits

ADC10DL065EVAL Summary of contents

Page 1

... TQFP package and will operate over the industrial temperature range of −40˚C to +85˚C. An evaluation board is available to ease the evaluation process. Connection Diagram TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2006 National Semiconductor Corporation Features n Single +3.3V supply operation n Internal sample-and-hold n Internal reference n Outputs 2 ...

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... Ordering Information Industrial (−40˚C ≤ T ADC10DL065CIVS ADC10DL065EVAL Block Diagram www.national.com ≤ +85˚C) Package A 64 Pin TQFP Evaluation Board 2 20148602 ...

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Pin Descriptions and Equivalent Circuits Pin No. Symbol ANALOG I A− B− REF 21 DF/DCS ...

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Pin Descriptions and Equivalent Circuits Pin No. Symbol MULTIPLEX 26–29 DA0–DA9 34–39 44–47 DB0–DB9 52–57 42 ABb 24, 25 ANALOG POWER 9, 18 10, 17, AGND 20, 61, ...

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... Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications – Voltage on Any Input or Output Pin Input Current at Any Pin (Note 3) Package Input Current (Note 3) Package Dissipation 25˚C A ESD Susceptibility ...

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Converter Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V +2.5V 0V, External V = +1.0V, f REF put mode. Boldface limits apply for T Symbol Parameter SNR ...

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DC and Logic Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V +2.5V 0V, External V = +1.0V, f REF put mode. Boldface limits apply for T Symbol ...

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AC Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V +2.5V 0V, External V = +1.0V, f REF put mode. Boldface limits apply for T Symbol Parameter Data ...

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Specification Definitions APERTURE DELAY is the time after the rising edge of the clock to when the input signal is acquired or held for conver- sion. APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample. ...

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Timing Diagram www.national.com Output Timing 10 20148609 ...

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Transfer Characteristic FIGURE 1. Transfer Characteristic 11 20148610 www.national.com ...

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Typical Performance Characteristics DNL, INL specifications apply for AGND = DGND = DR GND = 0V, V MHz pF/pin, Duty Cycle Stabilizer On, parallel output mode. Boldface limits apply for all ...

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Typical Performance Characteristics DNL, INL specifications apply for AGND = DGND = DR GND = 0V, V MHz pF/pin, Duty Cycle Stabilizer On, parallel output mode. Boldface limits apply for all ...

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Typical Performance Characteristics for AGND = DGND = DR GND = 0V pF/pin, Duty Cycle Stabilizer On, parallel output mode. Boldface limits apply for 25˚C J SNR, SINAD, SFDR vs. V SNR, ...

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Typical Performance Characteristics for AGND = DGND = DR GND = 0V pF/pin, Duty Cycle Stabilizer On, parallel output mode. Boldface limits apply for 25˚C (Continued) J SNR, SINAD, SFDR vs. f ...

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Typical Performance Characteristics for AGND = DGND = DR GND = 0V pF/pin, Duty Cycle Stabilizer On, parallel output mode. Boldface limits apply for 25˚C (Continued) J SNR, SINAD, SFDR vs. f ...

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Typical Performance Characteristics for AGND = DGND = DR GND = 0V pF/pin, Duty Cycle Stabilizer On, parallel output mode. Boldface limits apply for 25˚C (Continued) J Spectral Response @ 10 MHz ...

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Functional Description Operating on a single +3.3V supply, the ADC10DL065 uses a pipeline architecture and has error correction circuitry to help ensure maximum performance. The differential analog input signal is digitized to 10 bits. The user has the choice of ...

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Applications Information Where dev is the angular difference in degrees between the two signals having a 180˚ relative phase relationship to each other (see Figure 3). Drive the analog inputs with a source impedance less than 100Ω. 20148612 FIGURE 3. ...

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Applications Information constant clock line impedance throughout the length of the line. Refer to Application Note AN-905 for information on setting characteristic impedance highly desirable that the the source driving the ADC CLK pin only drive that pin. ...

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Applications Information t to increase, making it difficult to properly latch the ADC OD output data. The result could be an apparent reduction in dynamic performance. To minimize noise due to output switching, minimize the load currents at the digital ...

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Applications Information FIGURE 5. Application Circuit using Transformer Drive Circuit, Multiplex mode FIGURE 6. Optional Amplifier Differential Drive Circuit 4.0 POWER SUPPLY CONSIDERATIONS The power supply pins should be bypassed with a 10 µF capacitor and with a 0.1 µF ...

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Applications Information 5.0 LAYOUT AND GROUNDING Proper grounding and proper routing of all signals are es- sential to ensure accurate conversion. Maintaining separate analog and digital areas of the board, with the ADC10DL065 between these areas, is required to achieve ...

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Applications Information Be especially careful with the layout of inductors. Mutual inductance can change the characteristics of the circuit in which they are used. Inductors should not be placed side by side, even with just a small part of their ...

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Applications Information FIGURE 8. Isolating the ADC Clock from other Circuitry with a Clock Tree 7.0 COMMON APPLICATION PITFALLS Driving the inputs (analog or digital) beyond the power supply rails. For proper operation, all inputs should not go more than ...

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... BANNED SUBSTANCE COMPLIANCE National Semiconductor follows the provisions of the Product Stewardship Guide for Customers (CSP-9-111C2) and Banned Substances and Materials of Interest Specification (CSP-9-111S2) for regulatory environmental compliance. Details may be found at: www.national.com/quality/green. ...