EVAL-ADF7023-JDB2Z Analog Devices Inc, EVAL-ADF7023-JDB2Z Datasheet - Page 86

• Manufacturer Part Number: EVAL-ADF7023-JDB2Z
• Description: BOARD EVAL ADF7023-JDB2Z
• Manufacturer: Analog Devices Inc
• Series: -r
• Type: Transceiverr

Specifications of EVAL-ADF7023-JDB2Z

• Frequency: 902MHz ~ 958MHz
• Kit Application Type: Wireless Connectivity
• Application Sub Type: RF Transceiver
• Features: Operating At RF Band 902MHz To 958MHz, PC Interface And Control
• Silicon Manufacturer: Analog Devices
• Silicon Core Number: ADF7023
• Kit Contents: Board, Manual
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ADF7023

ADF7023-J
Table 77. 0x11B: PREAMBLE_MATCH
Bit
[7]
[6:4]
[3:0]
Table 78. 0x11C: SYMBOL_MODE
Bit
[7]
[6]
[5]
[4]
[3]
[2:0]
Table 79. 0x11D: PREAMBLE_LEN
Bit
[7:0]
Table 80. 0x11E: CRC_POLY_0
Bit
[7:0]
Table 81. 0x11F: CRC_POLY_1
Bit
[7:0]
Name
Reserved
MANCHESTER_ENC
PROG_CRC_EN
EIGHT_TEN_ENC
DATA_WHITENING
SYMBOL_LENGTH
Name
EXT_PA_LNA_CONFIG
Reserved
PREAMBLE_MATCH
Name
PREAMBLE_LEN
Name
CRC_POLY[7:0]
Name
CRC_POLY[15:8]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
EXT_PA_LNA_CONFIG
0
1
Set to 0
PREAMBLE_MATCH
15 to 13
12
11
10
9
8
7 to 1
0
Rev. 0 | Page 86 of 100
1: Manchester encoding and decoding enabled
1: programmable CRC enabled
1: 8b/10b encoding and decoding enabled
1: data whitening and dewhitening enabled
Description
Length of preamble in bytes. Example: a value of decimal 3 results in a
preamble of 24 bits.
Description
Lower byte of CRC_POLY[15:0], which sets the CRC polynomial. See Table 81.
Description
Upper byte of CRC_POLY[15:0], which sets the CRC polynomial. See the
Packet Mode section for more details on how to configure a CRC polynomial.
Description
Set to 0
0: Manchester encoding and decoding disabled
0: programmable CRC disabled
0: 8b/10b encoding and decoding disabled
0: data whitening and dewhitening disabled
SYMBOL_LENGTH
0
1
2 to 7
Description
External PA signal on ADCIN_ATB3 and external LNA
signal on ATB4 (1.8 V logic outputs)
External PA signal on XOSC32KP_GP5_ATB1 and
external LNA signal on XOSC32KN_ATB2 (V
outputs)
Description
Reserved
0 errors allowed
One erroneous bit pair allowed in 12 bit-pairs
Two erroneous bit pairs allowed in 12 bit-pairs
Three erroneous bit pairs allowed in 12 bit-pairs
Four erroneous bit pairs allowed in 12 bit-pairs
Not recommended
Preamble detection disabled
Description
8-bit (recommended except when 8b/10b is being used)
10-bit (for 8b/10b encoding)
Reserved
DD
logic