MCZ33989EG Freescale Semiconductor, MCZ33989EG Datasheet - Page 36

• Manufacturer Part Number: MCZ33989EG
• Description: IC SYSTEM BASIS CHIP CAN 28-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33989EG

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 28-SOIC (7.5mm Width)
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 29. LX2HS1 Control Bits
Table 27. TIM1 Control Bits
Table 28. LPC Register
details of the LPC register setup required for proper Cyclic
Sense or direct wake-up operation.
36
33989
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Sample
Figure 19. HS1 Operation when Cyclic Sense is Selected
LX2HS1
HS1
Please refer to the Cyclic Sense Wake-up discussion for
Reset Condition
CSP2
0
1
Reset Value
0
0
0
0
1
1
1
1
$110B
LPC
Cyclic Sense Timing, Off Time
HS1 OFF
Yes, Lx Inputs Sensed at Sampling Point
CSP1
0
0
1
1
0
0
1
1
Wake-Up Inputs Supplied by HS1
W
R
CSP0
Cyclic Sense on Time
0
1
0
1
0
1
0
1
No
N2R,STB2RSTO2R
HS1 ON
POR, NR2R
LX2HS1
D3
—
0
Cyclic Sense Timing (ms)
Lx Sampling Point
10 µs
100
200
400
10
20
40
75
5
t
N2R,STB2RSTO2R
POR, NR2R
FWU
Table 30. HS1AUTO Control Bits
Low Power Mode Control Register (LPC)
• The state of HS1 in Stop and Sleep mode (HS1
• Enable or disable the forced wake-up function (SBC
• Enable or disable the sense of the wake-up inputs (Lx) at
D2
—
HS1AUTO
0
This register controls:
permanently off or HS1 cyclic)
automatic wake-up after time spend in Sleep or Stop
modes, time is defined by the TIM2 register)
sampling point of the Cyclic Sense period (LX2HS1 bit).
0
1
ON, HS1 Cyclic, Period Defined in TIM2 Register
Auto Timing HS1 in Sleep and Stop Modes
Cyclic Sense/FWU Timing 1
Cyclic Sense/FWU Timing 2
Cyclic Sense/FWU Timing 3
Cyclic Sense/FWU Timing 4
Cyclic Sense/FWU Timing 5
Cyclic Sense/FWU Timing 6
Cyclic Sense/FWU Timing 7
Cyclic Sense/FWU Timing 8
Analog Integrated Circuit Device Data
D1
—
—
—
—
Parameter
OFF
Freescale Semiconductor
N2R,STB2RSTO2R
POR, NR2R
HS1AUTO
D0
—
0