DS33Z11+ Maxim Integrated Products, DS33Z11+ Datasheet - Page 112
DS33Z11+
Manufacturer Part Number
DS33Z11+
Description
IC MAPPER ETHERNET 169-CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33Z11.pdf
(172 pages)
Specifications of DS33Z11+
Applications
Data Transport
Interface
SPI/Parallel
Voltage - Supply
1.8V, 3.3V
Package / Case
169-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: SAPI Octet not equal to LI.TRX86SAPIH Interrupt Enable (SAPINE01IM) If this bit is set to 1,
LI.RX86S.SAPIHNE will generate an interrupt.
Bit 2: SAPI Octet not equal to LI.TRX86SAPIL Interrupt Enable (SAPINEFEIM) If this bit is set to 1,
LI.RX86S.SAPILNE will generate an interrupt.
Bit 1: Control not equal to LI.TRX8C Interrupt Enable (CNE3LIM) If this bit is set to 1, LI.RX86S.CNE will
generate an interrupt.
Bit 0: Address not equal to LI.TRX86A Interrupt Enable (ANE4IM) If this bit is set to 1, LI.RX86S.ANE will
generate an interrupt.
Bits 0 - 7: Transmit Queue Low Threshold (TQLT[0:7]) The transmit queue low threshold for the connection, in
increments of 32 packets of 2048 bytes each. The value of this register is multiplied by 32 * 2048 bytes to
determine the byte location of the threshold. Note that the transmit queue is for data that was received from the
Serial Interface to be sent to the Ethernet Interface.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
TQLT7
7
0
-
7
0
6
0
-
TQLT6
6
0
LI.RX86LSIE
Receive X.86 Interrupt Enable
123h
LI.TQLT
Serial Interface Transmit Queue Low Threshold (Watermark)
124h
5
0
-
TQLT5
5
0
4
0
-
112 of 172
TQLT4
4
0
SAPINE01IM
3
0
TQLT3
3
0
SAPINEFEIM
TQLT2
2
0
2
0
CNE3LI
TQLT1
M
1
0
1
0
ANE4IM
TQLT0
0
0
0
0
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