PI7C9X20404GPBNBE Pericom Semiconductor, PI7C9X20404GPBNBE Datasheet - Page 6

• Manufacturer Part Number: PI7C9X20404GPBNBE
• Description: IC PCIE PACKET SWITCH 148LFBGA
• Manufacturer: Pericom Semiconductor
• Series: GreenPacket™r

Specifications of PI7C9X20404GPBNBE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 148-LFBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

June 2009 – Revision 1.6
Pericom Semiconductor
7.2.6
7.2.7
7.2.8
7.2.9
7.2.10
7.2.11
7.2.12
7.2.13
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CLASS CODE REGISTER – OFFSET 08h .........................................................................................33
CACHE LINE REGISTER – OFFSET 0Ch.........................................................................................34
PRIMARY LATENCY TIMER REGISTER – OFFSET 0Ch ................................................................34
HEADER TYPE REGISTER – OFFSET 0Ch......................................................................................34
PRIMARY BUS NUMBER REGISTER – OFFSET 18h ......................................................................34
SECONDARY BUS NUMBER REGISTER – OFFSET 18h ................................................................34
SUBORDINATE BUS NUMBER REGISTER – OFFSET 18h ............................................................34
SECONDARY LATENCY TIMER REGISTER – OFFSET 18h ...........................................................35
I/O BASE ADDRESS REGISTER – OFFSET 1Ch..............................................................................35
I/O LIMIT ADDRESS REGISTER – OFFSET 1Ch.............................................................................35
SECONDARY STATUS REGISTER – OFFSET 1Ch ..........................................................................35
MEMORY BASE ADDRESS REGISTER – OFFSET 20h ...................................................................36
MEMORY LIMIT ADDRESS REGISTER – OFFSET 20h ..................................................................36
PREFETCHABLE MEMORY BASE ADDRESS REGISTER – OFFSET 24h.....................................36
PREFETCHABLE MEMORY LIMIT ADDRESS REGISTER – OFFSET 24h....................................36
PREFETCHABLE MEMORY BASE ADDRESS UPPER 32-BITS REGISTER – OFFSET 28h .........37
PREFETCHABLE MEMORY LIMIT ADDRESS UPPER 32-BITS REGISTER – OFFSET 2Ch .......37
I/O BASE ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h...................................................37
I/O LIMIT ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h..................................................37
CAPABILITY POINTER REGISTER – OFFSET 34h .........................................................................37
INTERRUPT LINE REGISTER – OFFSET 3Ch.................................................................................38
INTERRUPT PIN REGISTER – OFFSET 3Ch ...................................................................................38
BRIDGE CONTROL REGISTER – OFFSET 3Ch ..............................................................................38
POWER MANAGEMENT CAPABILITY ID REGISTER – OFFSET 80h ...........................................39
NEXT ITEM POINTER REGISTER – OFFSET 80h...........................................................................39
POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET 80h.............................................39
POWER MANAGEMENT DATA REGISTER – OFFSET 84h ............................................................39
PPB SUPPORT EXTENSIONS – OFFSET 84h..................................................................................40
DATA REGISTER – OFFSET 84h ......................................................................................................40
MSI CAPABILITY ID REGISTER – OFFSET 8Ch (Downstream Port Only) ....................................40
NEXT ITEM POINTER REGISTER – OFFSET 8Ch (Downstream Port Only) .................................41
MESSAGE CONTROL REGISTER – OFFSET 8Ch (Downstream Port Only) ..................................41
MESSAGE ADDRESS REGISTER – OFFSET 90h (Downstream Port Only) ....................................41
MESSAGE UPPER ADDRESS REGISTER – OFFSET 94h (Downstream Port Only) ......................41
MESSAGE DATA REGISTER – OFFSET 98h (Downstream Port Only) ...........................................41
VPD CAPABILITY ID REGISTER – OFFSET 9Ch (Upstream Port Only)........................................41
NEXT ITEM POINTER REGISTER – OFFSET 9Ch (Upstream Port Only) ......................................42
VPD REGISTER – OFFSET 9Ch (Upstream Port Only)....................................................................42
VPD DATA REGISTER – OFFSET A0h (Upstream Port Only).........................................................42
VENDOR SPECIFIC CAPABILITY ID REGISTER – OFFSET A4h..................................................42
NEXT ITEM POINTER REGISTER – OFFSET A4h ..........................................................................42
LENGTH REGISTER – OFFSET A4h ................................................................................................43
XPIP CSR0 – OFFSET A8h (Test Purpose Only)...............................................................................43
XPIP CSR1 – OFFSET ACh (Test Purpose Only) ..............................................................................43
REPLAY TIME-OUT COUNTER – OFFSET B0h..............................................................................43
ACKNOWLEDGE LATENCY TIMER – OFFSET B0h.......................................................................43
SWITCH OPERATION MODE – OFFSET B4h (Upstream Port)......................................................44
SWITCH OPERATION MODE – OFFSET B4h (Downstream Port) .................................................45
SSID/SSVID CAPABILITY ID REGISTER – OFFSET B8h................................................................45
NEXT ITEM POINTER REGISTER – OFFSET B8h ..........................................................................46
SUBSYSTEM VENDOR ID REGISTER – OFFSET BCh....................................................................46
SUBSYSTEM ID REGISTER – OFFSET BCh ....................................................................................46
GPIO CONTROL REGISTER – OFFSET D8h (Upstream Port Only)...............................................46
Page 6 of 79
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