PI7C9X20404GPBNBE Pericom Semiconductor, PI7C9X20404GPBNBE Datasheet - Page 10

• Manufacturer Part Number: PI7C9X20404GPBNBE
• Description: IC PCIE PACKET SWITCH 148LFBGA
• Manufacturer: Pericom Semiconductor
• Series: GreenPacket™r

Specifications of PI7C9X20404GPBNBE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 148-LFBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

1
June 2009 – Revision 1.6
Pericom Semiconductor
 4-lane PCI Express Switch with 4 PCI Express ports
 Non-blocking full-wired switching capability at 16 Gbps when all 4 ports are enabled
 Supports “Cut-through”(Default) as well as “Store and Forward” mode for packet switching
 Peer-to-peer switching between any two downstream ports
 150 ns typical latency for packet routed through Switch without blocking
 Strapped pins configurable with optional EEPROM or SMBus
 SMBus interface support
 Compliant with System Management (SM) Bus, Version 1.0
 Compliant with PCI Express Base Specification Revision 1.1
 Compliant with PCI Express CEM Specification Revision 1.1
 Compliant with PCI-to-PCI Bridge Architecture Specification Revision 1.2
 Compliant with Advanced Configuration Power Interface (ACPI) Specification
 Compliant with PCI Standard Hot-Plug Controller (SHPC) and Subsystem Specification Revision 1.0
 Reliability, Availability and Serviceability
 Advanced Power Saving
 Link Power Management
 Device State Power Management
 Port Arbitration: Round Robin (RR), Weighted RR and Time-based Weighted RR
 Extended Virtual Channel capability
 Supports Isochronous Traffic
 Supports up to 256-byte maximum payload size
 Programmable driver current and de-emphasis level at each individual port
 Low Power Dissipation at 0.8W typical in L0 normal mode
 Industrial Temperature Range -40
 148-pin LFBGA 12mm x 12mm package, 0.8 mm Ball Pitch
Features
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Supports Data Poisoning and End-to-End CRC
Advanced Error Reporting and Logging
Hot Plug support
IEEE 1149.6 JTAG interface support
Empty downstream ports are set to idle state to minimize power consumption
Supports L0, L0s, L1, L2, L2/L3
Active state power management for L0s and L1 states
Beacon or Wake# support in L2 state
Supports D0, D3
3.3V Aux Power support in D3
Two Virtual Channels (VC) and Eight Traffic Class (TC) support
Disabled VCs’ buffer is assigned to enabled VCs for resource sharing
Independent TC/VC mapping for each port
Provides VC arbitration selections: Strict Priority, Round Robin (RR) and Programmable
Weighted RR
Isochronous traffic class mapped to VC1 only
Strict time based credit policing
Hot
and D3
o
to 85
Cold
o
C
device power states
Cold
Ready
Page 10 of 79
power state
and L3 link power states
4Port-4Lane PCI Express Switch
GreenPacket
PI7C9X20404GP
Datasheet
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