SCANSTA101SM/NOPB National Semiconductor, SCANSTA101SM/NOPB Datasheet - Page 18

• Manufacturer Part Number: SCANSTA101SM/NOPB
• Description: IC TEST MASTER LOW-VOLT 49FBGA
• Manufacturer: National Semiconductor

Specifications of SCANSTA101SM/NOPB

• Applications: Testing Equipment
• Interface: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 49-FBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *SCANSTA101SM; *SCANSTA101SM/NOPB; SCANSTA101SM

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WRITING AND READING PARTIAL LONG WORDS
Care should be taken when writing a partial long word to
TDO_SM memory or reading a partial long word from TDI_SM
memory. Since the TDO_SM shifter shifts out LSB first, the
valid (meaningful) bits within a partial long word (i.e., long
word containing less than 32 valid bits to be shifted to the scan
chain) must be stored and written into the memory as the least
significant bits. This will assure that the desired bits will be
accurately loaded into the TDO_SM shifter and shifted out to
Data is shifted from the scan chain into the TDI_SM shifter
from MSB to LSB. Consequently, the valid (meaningful) bits
in a partial long word shifted into the TDI_SM shifter will reside
in the upper significant bit locations. For example, if a scan
operation involves shifting and evaluating 69 bits returning to
TDI_SM, the TDI_SM memory will be loaded with two long
words (i.e., two full long words plus a partial long word con-
taining 5 meaningful bits). If the last 5 bits shifted back to the
TDI_SM shifter are 11010, then upon completion of the shift
FIGURE 10. Reading a Partial Long Word from the TDI_SM Memory
FIGURE 9. Writing a Partial Long Word to the TDO_SM Memory
FIGURE 8. Timing from Mode Register to Sequencer Start
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the boundary scan chain. For instance, to shift a 3-bit (110)
sequence the partial long word should be written to the
TDO_SM memory as shown in
nificant 16 bits are shown). A subsequent enable and load of
the vector structure with the correct length will initialize the
shift operation and only the bits that are significant will be
shifted out to the scan chain.
operation, the TDI_SM shifter will contain the following partial
long word as shown in
bits are shown), which will subsequently be loaded into the
TDI_SM memory.
Following a read of a partial long word, the embedded test
software must adjust the position of the valid bits read from
the TDI_SM shifter/buffer or the position of the expected data
to assure that an accurate comparison is made (and the non-
meaningful bits are masked).
Figure 10
10121535
10121536
Figure 9
(only the most significant 16
(only the least sig-
10121534