SCANSTA101SM/NOPB National Semiconductor, SCANSTA101SM/NOPB Datasheet - Page 16

• Manufacturer Part Number: SCANSTA101SM/NOPB
• Description: IC TEST MASTER LOW-VOLT 49FBGA
• Manufacturer: National Semiconductor

Specifications of SCANSTA101SM/NOPB

• Applications: Testing Equipment
• Interface: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 49-FBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *SCANSTA101SM; *SCANSTA101SM/NOPB; SCANSTA101SM

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2.
3.
E.
F.
G. Repeat Steps 1B through Step 1G to configure the
H. For the subsequent vectors, if the TAP Tracker
I.
If the ScanBridge Support Initiate/Release bit was set
previously and is currently reset in the Setup register, the
SSIC will toggle TCK_SM five times while TMS_SM is
held high. This will return all selected ScanBridges to the
wait-for-address state and park the LSPs in the Test-
Logic-Reset state. When the ScanBridge support is
released the user should make sure that the Use Vector
and Use Sequencer bits in the Start register are not set,
so that the SSIC will not start processing a vector or the
sequencer immediately after releasing the ScanBridge
support. Once the ScanBridge support is released the
user may start processing a vector or the sequencer by
writing to the Start register.
If the sequencer is enabled (the Use Sequencer bit in the
Start register is one),
A.
B.
C. If the sequence repeat count is zero, the sequence
D. If the vector number is zero, decrement the
E.
mode register. The ScanBridge's TAP controller is
then sequenced through the Update-DR state.
Repeat Step 1C, but this time scan in the UNPARK
instruction so that the LSP is inserted into the active
scan chain.
Sequence the ScanBridge's TAP controller to enter
the RTI state (the LSP will not be unparked until its
TAP controller enters RTI).
ScanBridges in the remaining hierarchy levels. One
set of pre-shift pad and post-shift pad bits is added
to the patterns for each hierarchy level between the
STA Master and the ScanBridge being configured.
The pad bits are used to bypass the intermediate
levels of hierarchy.
enters the
a.
b.
The pad bits need to be stripped when loading a
vector into TDI_SM. This will be done by having a
status flag to indicate whether the vector that is
being scanned out has ScanBridge support or not.
If the scanned-out vector has ScanBridge support,
then the pad bits will be stripped when the TAP
Tracker enters the SDR or SIR states.
Clear the Results of Compare bit and set the Using
Sequencer bit in the Status register.
Fetch the sequence repeat count.
is complete so reset the Using Sequencer bit and
return to the Idle state, otherwise fetch the next
vector number and its repeat count.
sequence repeat count and return to Step 3C. If the
vector number is illegal, i.e., other than 001, 010,
011, or 100, decrement the sequence repeat count
and return to Step 3C.
If the vector repeat count is equal to zero, fetch the
next vector number and its repeat count and go to
SDR state, the SCANSTA101 will add one pre-
shift bit for the pad register and one post-shift
bit for the bypass register for each level of
hierarchy.
SIR state, the SCANSTA101 will add one pre-
shift bit for the pad register and eight post-shift
bits for the ScanBridge instruction register for
each level of hierarchy. The eight post-shift bits
will be all ones, forcing the ScanBridge into
bypass mode.
16
4.
5.
6.
7.
8.
9.
F.
If the sequencer is not enabled but a vector is enabled
(the Use Vector bits in the Start register are non-zero),
fetch the current vector structure and set the appropriate
Using Vector bits in the Status register. If neither the
sequencer nor a vector is enabled, return to the Idle state.
Fetch the Macro Structure to be used, set the vector/
macro control bits and store the TMS_SM bits in the
Structure Control registers.
If the Pre-shift TCK_SM Count is not zero, then enable
TCK_SM and drive TMS_SM using the first seven bits of
the macro until the Pre-shift TCK_SM Count is zero.
During pre-shift, TDO_SM will be driven with its previous
value.
If the macro type is State then,
A.
B.
C. If the sequencer is being used, then decrement the
If the macro type is BIST then,
A.
B.
C. If the sequencer is being used then, decrement the
If the macro type is Shift or Shift with Capture then,
A.
B.
C. If the ScanBridge Support Initiate/Release bit is set,
D. If the Use Data/Instruction Header is enabled, fetch
E.
F.
Step 3D. If the repeat count is non-zero fetch the
vector structure.
If the pre-load bit in the vector structure is not set,
reset the Using Sequencer bit and return to the Idle
state.
If the Macro Structure Bit 7 is enabled, set TMS_SM
to the bit 7 value of the macro structure and drive
TDO_SM with its previous value.
If the Macro Structure Bit 8 is enabled, set TMS_SM
to the bit 8 value of the macro structure and drive
TDO_SM with it's previous value and then go to Step
10.
vector repeat count and return to Step 3E. If a vector
is being used, return to the Idle state.
If the Macro Structure Bit 7 is enabled, set the count
length, set TMS_SM to the bit 7 value of the macro
structure and drive TDO_SM with the default value
(Setup register bit 6) until the count length is zero.
If the Macro Structure Bit 8 is enabled, set TMS_SM
to the bit 8 value of the macro structure and drive
TDO_SM with the default value (Setup register bit 6)
and then go to Step 10.
vector repeat count and return to Step 3E. If a vector
is being used, return to the Idle state.
If the macro type is Shift with Capture, enable TDI
capture.
If the Sync Bit Support Enable bit is set, fetch sync
bit count, set the count length, set TMS_SM to the
loop bit and drive the TDO_SM high until sync bit
count is zero.
drive the TDO_SM with pre- PAD bit (high) and while
TMS_SM remains set to the loop bit. Repeat for
each level of hierarchy.
the header length and data, set the count length, and
drive the TDO_SM with header data until the header
length is zero and while TMS_SM remains set to the
loop bit.
If the Compare or Mask/Compare is set, enable the
comparator.
Set the vector count length, and drive the TDO_SM
with vector data until the count length is one and
while TMS_SM remains set to the loop bit. In the
LotF mode if the count length is not zero and the