HSDL-7002 Lite-On Electronics, HSDL-7002 Datasheet - Page 2

• Manufacturer Part Number: HSDL-7002
• Description: IC ENCODER/DECODER IRDA 16-QFN
• Manufacturer: Lite-On Electronics
• Type: Infrared Encoder/Decoderr

Specifications of HSDL-7002

• Applications: Fax, Modems, Pagers
• Voltage - Supply, Analog: 2.7 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 16-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 516-1702-2

CORNER
Figure 2. HSDL-7002 Pin Configuration
I/O Pins Configuration Table
Note:
There are two methods of putting the internal oscillator cell in POWERDOWN MODE. Whenever the CLK_SEL pin is asserted high (external clock
select) the oscillator is automatically put in powerdown mode, or whenever the POWERDN pin asserted high.
2
1
2
3
4
5
6
7
8
9
10 IR_TXD
11 PULSEMOD Digital In
12 POWERDN
13 OSCOUT
14 OSCIN
15 Vcc
16 16XCLK
PIN #1
Pin 1
Pin 2
Pin 3
Pin 4
Name
TXD
RXD
A0
A1
A2
CLK_SEL
GND
NRST
IR_RXD
Type
Digital In
Digital Out
Digital In
Digital In
Digital In
Digital In
Digital In
Digital In
Digital Out
(with pull down)
Digital In
(with pull down)
Analog Out
Analog In
Digital In
Pin 12
Pin 10
Pin 11
Pin 9
Function
Negative edge triggered input signal that is normally tied to the SOUT signal
of the UART (serial data to be transmitted). Data is modulated and output as
IR_TXD.
Output signal normally tied to SIN signal of a UART (received serial data).
RXD is the demodulated output of IR_RXD.
Clock Multiplex Signal
Clock Multiplex Signal
Clock Multiplex Signal
Used to activate either the internal or external clock. A high on this line
activated the external clock (16XCLK) and a low activates the internal clock.
When the external clock is activated, the internal oscillator is put in POWERDN
mode.
Chip Ground
Activate low signal used to reset the IrDA
chine. This signal can be tied to POR (Power-On-Reset) or Vcc.
Input from SIR optoelectronics. Input signal is a 3/16th or 1.63 ms pulse that is
demodulated to generate RXD output signal.
This is the modulated TXD signal.
A high level on this input put the chip into the monoshot transmit mode. In
this mode, when there is a negative transition on the TXD input, a rising edge
on the internal transmit modulation state machine will activate a high pulse
on IR_TXD for 6 crystal clock cycles. With a 3.6864 MHz crystal, this corre-
sponds to 1.63 ms. This mode cannot be used in conjunction with the 16XCLK
clock. It is meant to be used with the external crystal clock. By default, this
input pin is pulled to GND
A high on this input put only the internal oscillator cell in POWERDN mode.
The cell is normally not powered down.
Oscillator Output
Oscillator Input
Power
Positive edge triggered input clock that is set to 16 times the data transmis-
sion baud rate. The encode and decode schemes require this signal. The signal
is usually tied to a UART’s BAUDOUT signal. The 16XCLK may be provided by
application circuitry if BAUDOUT is not available. This signal is required when
the internal clock is not used.
Order Information
Marking Information
The unit is marked with A7002 and ‘yyww’ on the chip.
yy = year
ww = work week
Part Number Packaging Type
HSDL-7002
Tape and Reel

SIR Encode & Decode state ma-
Quantity
2500