ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 96

IC VIDEO DECODER NTSC 64-LFCSP

ADV7181BCP

Manufacturer Part Number
ADV7181BCP
Description
IC VIDEO DECODER NTSC 64-LFCSP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheets

Specifications of ADV7181BCP

Applications
Recorders, Set-Top Boxes
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Adc/dac Resolution
9b
Screening Level
Industrial
Package Type
LFCSP EP
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
Lead Free Status / RoHS Status
Compliant, Contains lead / RoHS non-compliant
ADV7181
PCB LAYOUT RECOMMENDATIONS
The ADV7181 is a high precision, high speed mixed-signal
device. To achieve the maximum performance from the part, it
is important to have a well laid out PCB board. The following is
a guide for designing a board using the ADV7181.
ANALOG INTERFACE INPUTS
The inputs should receive care when being routed on the PCB.
Track lengths should be kept to a minimum, and 75 Ω trace
impedances should be used when possible. Trace impedances
other than 75 Ω also increase the chance of reflections.
POWER SUPPLY DECOUPLING
It is recommended to decouple each power supply pin with
0.1 µF and 10 nF capacitors. The fundamental idea is to have a
decoupling capacitor within about 0.5 cm of each power pin.
Also, avoid placing the capacitor on the opposite side of the PC
board from the ADV7181; doing so interposes resistive vias in
the path. The decoupling capacitors should be located between
the power plane and the power pin. Current should flow from
the power plane to the capacitor to the power pin. Do not make
the power connection between the capacitor and the power pin.
Placing a via underneath the 100 nF capacitor pads, down to the
power plane, is generally the best approach (see Figure 37).
It is particularly important to maintain low noise and good
stability of PVDD. Careful attention must be paid to regulation,
filtering, and decoupling. It is highly desirable to provide
separate regulated supplies for each of the analog circuitry
groups (AVDD, DVDD, DVDDIO, and PVDD).
Some graphic controllers use substantially different levels of
power when active (during active picture time) and when idle
(during horizontal and vertical sync periods). This can result in
a measurable change in the voltage supplied to the analog
supply regulator, which can, in turn, produce changes in the
regulated analog supply voltage. This can be mitigated by
regulating the analog supply, or at least PVDD, from a different,
cleaner, power source, for example, from a 12 V supply.
Figure 37. Recommend Power Supply Decoupling
GND
VDD
10nF
100nF
VIA TO SUPPLY
VIA TO GND
Rev. B | Page 96 of 104
It is also recommend to use a single ground plane for the entire
board. This ground plane should have a spacing gap between
the analog and digital sections of the PCB (see Figure 38).
Experience has repeatedly shown that the noise performance is
the same or better with a single ground plane. Using multiple
ground planes can be detrimental because each separate ground
plane is smaller, and long ground loops can result.
In some cases, using separate ground planes is unavoidable. For
those cases, it is recommended to at least place a single ground
plane under the ADV7181. The location of the split should be
under the ADV7181. For this case, it is even more important to
place components wisely because the current loops are much
longer (current takes the path of least resistance). An example
of a current loop: power plane to ADV7181 to digital output
trace to digital data receiver to digital ground plane to analog
ground plane.
PLL
Place the PLL loop filter components as close to the ELPF pin as
possible. Do not place any digital or other high frequency traces
near these components. Use the values suggested in the data
sheet with tolerances of 10% or less.
DIGITAL OUTPUTS (BOTH DATA AND CLOCKS)
Try to minimize the trace length that the digital outputs have to
drive. Longer traces have higher capacitance, which requires
more current, which causes more internal digital noise. Shorter
traces reduce the possibility of reflections.
Adding a 30 Ω and 50 Ω series resistor can suppress reflections,
reduce EMI, and reduce the current spikes inside the ADV7181.
If series resistors are used, place them as close as possible to the
ADV7181 pins. However, try not to add vias or extra length to
the output trace to make the resistors closer.
If possible, limit the capacitance that each of the digital outputs
drives to less than 15 pF. This can easily be accomplished by
keeping traces short and by connecting the outputs to only one
device. Loading the outputs with excessive capacitance increases
the current transients inside the ADV7181, creating more
digital noise on its power supplies.
ANALOG
SECTION
Figure 38. PCB Ground Layout
ADV7181
SECTION
DIGITAL

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