ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 80

• Manufacturer Part Number: ADV7181BCP
• Description: IC VIDEO DECODER NTSC 64-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7181BCP

• Applications: Recorders, Set-Top Boxes
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Adc/dac Resolution: 9b
• Screening Level: Industrial
• Package Type: LFCSP EP
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
• Lead Free Status / RoHS Status: Compliant, Contains lead / RoHS non-compliant

ADV7181
Table 188. Registers 0x34 to 0x36
Subaddress
0x34
0x35
0x36
Table 189. Register 0x37
Subaddress
0x37
Register
HS Position
Control 1
HS Position
Control 2
HS Position
Control 3
Register
Polarity
Bit Description
PCLK. Sets the polarity of LLC1.
Reserved.
PF. Sets the FIELD polarity.
Reserved.
PVS. Sets the VS polarity.
Reserved.
PHS. Sets HS polarity.
Bit Description
HSE[10:8]. HS end allows the
positioning of the HS output
within the video line.
Reserved.
HSB[10:8]. HS begin allows
the positioning of the HS
output within the video line.
Reserved.
HSB[7:0] See above, using
HSB[9:0] and HSE[9:0] the user
can program the position and
length of HS output signal.
HSE[7:0] See above.
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7
0
0
0
7
0
1
6
0
6
0
0
0
5
0
0
0
5
0
1
4
0
0
0
4
0
Bit
Bit
3
0
0
0
3
0
1
2
0
0
0
2
0
1
0
1
0
1
0
0
0
0
0
0
0
1
Comments
Invert polarity
Normal polarity as per
Set to 0
Active high
Active low
Set to 0
Active high
Active low
Set to 0
Active high
Active low
Comments
HS output ends
HSE[10:0] pixels
after the falling
edge of HSync.
Set to 0.
HS output starts
HSB[10:0] pixels
after the falling
edge of HSync.
Set to 0.
Notes
Using HSB and HSE,
the user can program
the position and
length of the output
HSync.
Timing Diagrams