ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 94

• Manufacturer Part Number: ADV7181BCP
• Description: IC VIDEO DECODER NTSC 64-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7181BCP

• Applications: Recorders, Set-Top Boxes
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Adc/dac Resolution: 9b
• Screening Level: Industrial
• Package Type: LFCSP EP
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
• Lead Free Status / RoHS Status: Compliant, Contains lead / RoHS non-compliant

ADV7181
MODE 2—S-VIDEO INPUT (Y ON AIN1 AND C ON AIN4)
All standards are supported through autodetect, 8-bit, ITU-R BT.656 output on P15–P8.
Table 205. Mode 2—S-Video Input
Register Address
0x00
0x01
0x2B
0x3A
0x50
0x51
0xC3
0xC4
0xD2
0xD3
0xDB
0x0E
0xB5
0xD4
0xD6
0xE2
0xE3
0xE4
0xE8
0x0E
1
MODE 3—525i/625i YPrPb INPUT (Y ON AIN1, Pr ON AIN3, AND Pb ON AIN5)
All standards are supported through autodetect, 8-bit, ITU-R BT.656 output on P15–P8.
Table 206. Mode 3—YPrPb Input 525i/625i
Register Address
0x00
0x01
0x2B
0x3A
0x51
0xC3
0xC4
0xD2
0xD3
0xDB
0x0E
0xD6
0xE8
0x0E
1
For all SECAM modes of operation, the Hsync processor must be turned off.
For all YPrPb input modes of operation, the Hsync processor must be turned off.
Register Value
0x0A
0x88
0xE2
0x10
0x24
0xC9
0x8D
0x01
0x01
0x9B
0x85
0x6D
0xF3
0x05
Register Value
0x06
0x88
0xE2
0x12
0x04
0x24
0x41
0x80
0x01
0x01
0x9B
0x85
0x8B
0xFB
0x6D
0xAF
0x00
0xB5
0xF3
0x05
Notes
Y2 = AIN2, Pr2 = AIN3, Pb2 = AIN6.
Disable HSync PLL.
AGC flash tweak.
Set latch clock.
Turn off FSC detect for IN LOCK status.
Man mux AIN1 to ADC0 (1001), AIN3 to ADC1 (1100).
Set setadc_sw_man_en = 1.
AGC flash tweak.
AGC flash tweak.
AGC flash tweak.
ADI recommended programming sequence. This sequence must be followed exactly when setting
up the decoder.
Recommended setting.
Recommended setting.
Recommended setting.
Notes
S-Video input.
Turn off HSYNC processor (SECAM only).
AGC flash tweak.
Power down ADC 2.
Set DNR threshold.
Turn off FSC detect for IN LOCK status.
Man mux AIN2 to ADC0 (0001), AIN4 to ADC1 (0100).
Set setadc_sw_man_en = 1.
AGC flash tweak.
AGC flash tweak.
AGC flash tweak.
ADI recommended programming sequence. This sequence must be followed exactly when
setting up the decoder.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
1
Rev. B | Page 94 of 104
1