ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 55

IC VIDEO DECODER NTSC 64-LFCSP

ADV7181BCP

Manufacturer Part Number
ADV7181BCP
Description
IC VIDEO DECODER NTSC 64-LFCSP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheets

Specifications of ADV7181BCP

Applications
Recorders, Set-Top Boxes
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Adc/dac Resolution
9b
Screening Level
Industrial
Package Type
LFCSP EP
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
Lead Free Status / RoHS Status
Compliant, Contains lead / RoHS non-compliant
Table 150. Data Byte Allocation
1
1
0
0
Notes
DID. The data identification value is 0x140 (10-bit value).
Care has been taken that in 8-bit systems, the 2 LSBs do
not carry vital information.
EP and !EP. The EP bit is set to ensure even parity on the
data-word D[8:0]. Even parity means there is always an
even number of 1s within the D[8:0] bit arrangement. This
includes the EP bit. !EP describes the logic inverse of EP
and is output on D[9]. The !EP is output to ensure that the
reserved codes of 00 and FF cannot happen.
EF. Even field identifier. EF = 1 indicates that the data was
recovered from a video line on an even field.
2X. This bit indicates whether the data sliced was in
Gemstar 1× or 2× format. A high indicates 2× format.
line[3:0]. This entry provides a code that is unique for each
of the possible 16 source lines of video from which
Gemstar data may have been retrieved. Refer to Table 162
and Table 163.
DC[1:0]. Data count value. The number of user data-words
in the packet divided by 4. The number of user data-words
(UDW) in any packet must be an integral number of 4.
Padding is required at the end, if necessary. (Requirement
as set in ITU-R BT.1364.) Refer to Table 150.
The 2X bit determines whether the raw information
retrieved from the video line was 2 or 4 bytes. The state of
the GDECAD bit affects whether the bytes are transmitted
straight (that is, two bytes transmitted as two bytes) or
whether they are split into nibbles (that is, two bytes
transmitted as four half bytes). Padding bytes are then
added where necessary.
Raw Information Bytes
Retrieved from the Video Line
4
4
2
2
GDECAD
0
1
0
1
Rev. B | Page 55 of 104
User Data-Words
(Including Padding)
8
4
4
4
Table 151 to Table 154 outline the possible data packages.
Gemstar 2× Format, Half-Byte Output Mode
Half-byte output mode is selected by setting CDECAD = 0;
full-byte output mode is selected by setting CDECAD = 1.
See the GDECAD Gemstar Decode Ancillary Data Format,
Address 0x4C [0] section.
Gemstar 1× Format
Half-byte output mode is selected by setting CDECAD = 0;
full-byte output mode is selected by setting CDECAD = 1.
See the GDECAD Gemstar Decode Ancillary Data Format,
Address 0x4C [0] section.
CS[8:2]. The checksum is provided to determine the
integrity of the ancillary data packet. It is calculated by
summing up D[8:2] of DID, SDID, the Data Count byte,
and all UDWs, and ignoring any overflow during the
summation. Since all data bytes that are used to calculate
the checksum have their 2 LSBs set to 0, the CS[1:0] bits
are also always 0.
!CS[8] describes the logic inversion of CS[8]. The value
!CS[8] is included in the checksum entry of the data packet
to ensure that the reserved values of 0x00 and 0xFF do not
occur.
Padding Bytes
0
0
0
2
ADV7181
DC[1:0]
10
01
01
01

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