ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 48

• Manufacturer Part Number: ADV7181BCP
• Description: IC VIDEO DECODER NTSC 64-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7181BCP

• Applications: Recorders, Set-Top Boxes
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Adc/dac Resolution: 9b
• Screening Level: Industrial
• Package Type: LFCSP EP
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
• Lead Free Status / RoHS Status: Compliant, Contains lead / RoHS non-compliant

ADV7181
PVBEGDELO PAL VSync Begin Delay on Odd Field,
Address 0xE8 [7]
Table 122. PVBEGDELO Function
PVBEGDELO
0 (default)
1
PVBEGDELE PAL VSync Begin Delay on Even Field,
Address 0xE8 [6]
Table 123. PVBEGDELE Function
PVBEGDELE
0
1 (default)
PVBEGSIGN PAL VSync Begin Sign, Address 0xE8 [5]
Table 124. PVBEGSIGN Function
PVBEGSIGN
0
1 (default)
NOT VALID FOR USER
PROGRAMMING
VSYNC BY PVBEG[4:0]
ADVANCE BEGIN OF
Description
Delay begin of VSync. Set for user manual
programming.
Advance begin of VSync. Not recommended for
user programming.
Description
No delay.
Delay VSync going high on an even field by a line
relative to PVBEG.
Description
No delay.
Delay VSync going high on an odd field by a line
relative to PVBEG.
ADVANCE BY
PVBEGDELO
ADDITIONAL
DELAY BY
0.5 LINE
VSBHO
1 LINE
YES
1
1
Figure 27. PAL VSync Begin
1
VSYNC BEGIN
0
0
PVBEGSIGN
ODD FIELD?
0
0
VSYNC BY PVBEG[4:0]
DELAY BEGIN OF
ADVANCE BY
PVBEGDELE
ADDITIONAL
DELAY BY
0
0.5 LINE
VSBHE
1 LINE
NO
1
1
Rev. B | Page 48 of 104
PVBEG[4:0] PAL VSync Begin, Address 0xE8 [4:0]
Table 125. PVBEG Function
PVBEG
00101 (default)
For all NTSC/PAL VSync timing controls, both the V bit in the
AV code and the VSync on the VS pin are modified.
PVENDDELO PAL VSync End Delay on Odd Field,
Address 0xE9 [7]
Table 126. PVENDDELO Function
PVENDDELO
0 (default)
1
PVENDDELE PAL VSync End Delay on Even Field,
Address 0xE9 [6]
Table 127. PVENDDELE Function
PVENDDELE
0 (default)
1
NOT VALID FOR USER
PROGRAMMING
VSYNC BY PVEND[4:0]
ADVANCE END OF
Description
No delay.
Delay VSync going low on an even field by a line
relative to PVEND.
ADVANCE BY
PVENDDELO
ADDITIONAL
DELAY BY
Description
No delay.
Delay VSync going low on an odd field by a
line relative to PVEND.
0.5 LINE
VSEHO
1 LINE
Description
PAL VSync begin position.
YES
1
1
Figure 28. PAL VSync End
1
0
0
ODD FIELD?
PVENDSIGN
VSYNC END
0
0
DELAY END OF VSYNC
BY PVEND[4:0]
ADVANCE BY
ADDITIONAL
PVENDDELE
DELAY BY
0
0.5 LINE
VSEHE
1 LINE
NO
1
1