LAN8710A-EZK SMSC, LAN8710A-EZK Datasheet - Page 34

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LAN8710A-EZK

Manufacturer Part Number
LAN8710A-EZK
Description
TXRX ETHERNET 10/100 MII/RMII
Manufacturer
SMSC
Type
Transceiverr
Datasheet

Specifications of LAN8710A-EZK

Number Of Drivers/receivers
4/4
Protocol
MII, RMII
Voltage - Supply
1.6 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
32-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1079
LAN8710A-EZK

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MDI0
Revision 1.0 (04-15-09)
MDC
MDIO
MDC
Preamble
Preamble
32 1's
32 1's
applications and in production testing, where the same register can be written in all the transceivers
using a single write transaction.
The MDC signal is an aperiodic clock provided by the station management controller (SMC). The MDIO
signal receives serial data (commands) from the controller SMC, and sends serial data (status) to the
SMC. The minimum time between edges of the MDC is 160 ns. There is no maximum time between
edges.
The minimum cycle time (time between two consecutive rising or two consecutive falling edges) is 400
ns. These modest timing requirements allow this interface to be easily driven by the I/O port of a
microcontroller.
The data on the MDIO line is latched on the rising edge of the MDC. The frame structure and timing
of the data is shown in
The timing relationships of the MDIO signals are further described in
Interface (SMI) Timing," on page
Start of
0
Frame
Start of
Frame
0
Figure 4.8 MDIO Timing and Frame Structure - WRITE Cycle
1
Figure 4.7 MDIO Timing and Frame Structure - READ Cycle
1
1
0
Code
Code
OP
OP
0
1
A4 A3 A2 A1 A0 R4 R3 R2 R1 R0
A4 A3 A2 A1 A0 R4 R3 R2 R1 R0
Figure 4.7
PHY Address
PHY Address
Data To Phy
Read Cycle
Write Cycle
MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR
55.
and
DATASHEET
Data To Phy
Figure
34
4.8.
Register Address
Register Address
Around
Around
Turn
Turn
Section 6.1, "Serial Management
D15
D15
D14
D14
SMSC LAN8710/LAN8710i
®
Data From Phy
Technology in a Small Footprint
Data
Data
...
...
...
...
D1
D1
Datasheet
D0
D0

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