Z16FMC28AG20SG Zilog, Z16FMC28AG20SG Datasheet - Page 78
![Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D](/photos/39/69/396954/tqfp-64_sml.jpg)
Z16FMC28AG20SG
Manufacturer Part Number
Z16FMC28AG20SG
Description
Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet
1.Z16FMC28AG20_EG.pdf
(341 pages)
Specifications of Z16FMC28AG20SG
Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
0 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z16FMC28AG20SG
Manufacturer:
Zilog
Quantity:
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PS028702-1210
Bits
5
4
3
2
1
0
Interrupt Request 1 Register
Description (Continued)
T0I – Timer 0 Interrupt Request
0 = No interrupt request is pending for timer 0.
1 = An interrupt request from timer 0 is awaiting service. Writing a 1 to this bit Resets it to 0.
U0RXI – UART 0 Receiver Interrupt Request
0 = No interrupt request is pending for the UART 0 receiver.
1 = An interrupt request from the UART 0 receiver is awaiting service. Writing a 1 to this bit
resets it to 0.
U0TXI – UART 0 Transmitter Interrupt Request
0 = No interrupt request is pending for the UART 0 transmitter.
1 = An interrupt request from the UART 0 transmitter is awaiting service. Writing a 1 to this bit
resets it to 0.
I2CI – I
0 = No interrupt request is pending for the I
1 = An interrupt request from the I
SPII – SPI Interrupt Request
0 = No interrupt request is pending for the SPI.
1 = An interrupt request from the SPI is awaiting service. Writing a 1 to this bit resets it to 0.
ADCI – ADC Interrupt Request
0 = No interrupt request is pending for ADC.
1 = An interrupt request from ADC is awaiting service. Writing a 1 to this bit resets it to 0.
The Interrupt Request 1 (IRQ1) Register (see Table 33) stores interrupt requests for both
vectored and polled interrupts. When a request is presented to the interrupt controller, the
corresponding bit in the IRQ1 Register becomes 1. If interrupts are globally enabled (vec-
tored interrupts), the interrupt controller passes an interrupt request to the CPU. If inter-
rupts are globally disabled (polled interrupts), the CPU reads the Interrupt Request 1
Register to determine, if any interrupt requests are pending. Writing 1 to the bits in this
register clears the interrupt. The bits of this register are set by writing 1 to the interrupt
request 1 set regsiter (IRQ1SET) at address
2
C Interrupt Request
P R E L I M I N A R Y
2
C is awaiting service. Writing a 1 to this bit resets it to 0.
2
C.
FF_E035H
Z16FMC Series Motor Control MCUs
.
Product Specification
Interrupt Controller
56
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