Z16FMC28AG20SG Zilog, Z16FMC28AG20SG Datasheet - Page 272
![Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D](/photos/39/69/396954/tqfp-64_sml.jpg)
Z16FMC28AG20SG
Manufacturer Part Number
Z16FMC28AG20SG
Description
Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet
1.Z16FMC28AG20_EG.pdf
(341 pages)
Specifications of Z16FMC28AG20SG
Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
0 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z16FMC28AG20SG
Manufacturer:
Zilog
Quantity:
176
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Table 144. Option Bits At Program Memory Address 0000H
PS028702-1210
Bits
Field
RESET
R/W
ADDR
Note: U = Unchanged by Reset; R/W = Read/Write.
OSC_SEL[1:0] – Oscillator mode selection
WDT_RES – WDT Reset
WDT_AO – WDT always on
VBO_AO – Voltage Brownout protection always on
DBGUART – Debug UART enable
FWP—Flash Write Protect
00 = On-chip oscillator configured for use with external RC networks (<4 MHz).
01 = Minimum power for use with very low frequency crystals (32 kHz to 1.0 MHz).
10 = Medium power for use with medium frequency crystals or ceramic resonators
(0.5 MHz to 10.0 MHz).
11 = Maximum power for use with high frequency crystals (8.0 MHz to 20.0 MHz). This setting is the
default for unprogrammed (erased) Flash.
0 = WDT timeout generates an interrupt request. Interrupts must be globally enabled for the CPU to
acknowledge the interrupt request.
1 = WDT timeout causes a Short Reset. This setting is the default for unprogrammed (erased) Flash.
0 = WDT is automatically enabled after reset. The WDT oscillator is disabled by clearing the WDTEN
bit in the OSCCTL register.
1 = WDT is enabled upon execution of the WDT instruction. The WDT oscillator is disabled by clearing
the WDTEN bit in the OSCCTL register.
0 = Voltage Brownout protection is disabled in STOP mode to reduce total power
consumption.
1 = Voltage Brownout protection is always enabled, including during STOP mode. This setting is the
default for unprogrammed (erased) Flash.
0 = The Debug UART option is enabled.
1 = The Debug UART option is disabled.
0 = Programming, Page Erase and Mass Erase through user code is disabled. Flash operations are
allowed through the On-Chip Debugger
1 = Programming, Page Erase and Mass Erase are enabled for all of Flash Program Memory.
R/W
OSC_SEL[1:0]
U
7
R/W
U
6
WDT_RES WDT_AO
R/W
U
5
P R E L I M I N A R Y
Program Memory 0000H
R/W
U
4
VBO_AO DBGUART
R/W
U
3
Z16FMC Series Motor Control MCUs
R/W
U
2
Product Specification
FWP
R/W
U
1
Option Bits
R/W
RP
U
0
250
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