Z16FMC28AG20SG Zilog, Z16FMC28AG20SG Datasheet - Page 158
![Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D](/photos/39/69/396954/tqfp-64_sml.jpg)
Z16FMC28AG20SG
Manufacturer Part Number
Z16FMC28AG20SG
Description
Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet
1.Z16FMC28AG20_EG.pdf
(341 pages)
Specifications of Z16FMC28AG20SG
Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
0 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z16FMC28AG20SG
Manufacturer:
Zilog
Quantity:
176
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Table 79. LIN Control Register (UxCTL1 with MSEL = 010b)
PS028702-1210
Bits
Field
RESET
R/W
ADDR
Bits
7
6
5
4
3:2
1:0
Description
LMST – LIN Master Mode
0 = LIN Master mode not selected.
1 = LIN Master mode selected (if MPEN, PEN, LSLV = 0)
LSLV – LIN Slave Mode
0 = LIN Slave mode not selected.
1 = LIN Slave mode selected (if MPEN, PEN, LMST = 0)
ABEN – Autobaud Enable
0 = Autobaud not enabled.
1 = Autobaud enabled if in LIN SLAVE mode.
ABIEN – Autobaud Interrupt Enable
0 = Interrupt following autobaud does not occur.
1 = Interrupt following autobaud enabled if in LIN SLAVE mode. When the autobaud character
is received, a receive interrupt is generated and the ATB bit is set in the Status 0 Register.
LinState[1:0] – LIN State Machine
The LinState is controlled by both hardware and software. Software force a state change at any
time if necessary. In normal operation, software moves the state in and out of Sleep state. For
a LIN Slave, software changes the state from Sleep to Wait for Break after which hardware
cycles through the Wait for Break, Autobaud and Active states. Software changes the state
from one of the active states to Sleep state if the LIN bus goes into Sleep mode. For a LIN
Master, software changes state from Sleep to Active where it remains until software sets it
back to the Sleep state. After configuration software does not alter the LinState field during
operation.
00 = Sleep State (either LMST or LSLV is set)
01 = Wait for Break state (only valid for LSLV = 1)
10 = Autobaud state (only valid for LSLV = 1)
11 = Active state (either LMST or LSLV is set)
TxBreakLength – Used in LIN mode by the master to control the duration of the transmitted
Break.
00 = 13 bit times
01 = 14 bit times
10 = 15 bit times
11 = 16 bit times
LMST
R/W
7
0
LIN Control Register (LIN-UART Control1 Register with MSEL = 010b)
When
MSEL
LSLV
R/W
6
0
=
010b
, this register provides control for LIN mode of operation.
ABEN
FF_E203H, FF_E213H with MSEL = 010b
R/W
5
0
P R E L I M I N A R Y
ABIEN
R/W
4
0
R/W
Z16FMC Series Motor Control MCUs
3
0
LinState[1:0]
R/W
2
0
Product Specification
R/W
TxBreakLength
1
0
LIN-UART
R/W
0
0
136
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