Z16FMC28AG20SG Zilog, Z16FMC28AG20SG Datasheet - Page 50
![Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D](/photos/39/69/396954/tqfp-64_sml.jpg)
Z16FMC28AG20SG
Manufacturer Part Number
Z16FMC28AG20SG
Description
Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet
1.Z16FMC28AG20_EG.pdf
(341 pages)
Specifications of Z16FMC28AG20SG
Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
0 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z16FMC28AG20SG
Manufacturer:
Zilog
Quantity:
176
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Table 5. Register File Address Map (Continued)
PS028702-1210
Address (Hex)
FF_E44E
FF_E44F
Analog Block Base Address = FF_E500
ADC Base Address = FF_E500
FF_E500
FF_E501
FF_E502
FF_E503
FF_E504
FF_E505
FF_E506
FF_E507
FF_E508-FF_E50F
FF_E510
FF_E511
FF_E512
FF_E513
Option Trim Registers Base Address = FF_FF00
FF_FF00-FF_FF24
FF_FF25
FF_FF26
FF_FF27
Note: XX=Undefined.
Register Description
DMA3 List Address High
DMA3 List Address Low
ADC0 Control Register
Reserved
ADC0 Data High Byte Register
ADC0 Data Low Bits Register
ADC Sample and Settling Time
Register
ADC Sample Hold Time
ADC Clock Prescale Register
ADC0 MAX Register
Reserved
Comparator and Op-Amp Control CMPOPC
Reserved
ADC Sample Timer Capture High ADCTCAPH
ADC Sample Timer Capture Low
Reserved for internal Zilog
IPO Trim 1
IPO Trim 2
ADC Reference Voltage Trim
P R E L I M I N A R Y
®
use
Mnemonic
DMA3LARH
DMA3LARL
ADC0CTL
ADC0D_H
ADC0D_L
ADCSST
ADCST
ADCCP
ADC0MAX
ADCTCAPL
IPOTRIM1
IPOTRIM2
ADCTRIM
Z16FMC Series Motor Control MCUs
–
–
–
–
Product Specification
Peripheral Address Map
Reset (Hex)
00
00
00
XX
XX
0F
3F
00
00
00
XX
XX
XX
XX
XX
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–
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