STM32W108CBU63TR STMicroelectronics, STM32W108CBU63TR Datasheet - Page 150

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STM32W108CBU63TR

Manufacturer Part Number
STM32W108CBU63TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32W108CBU63TR

Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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General-purpose timers
10.3.7
150/209
31
15
Reserved
30
14
Bits [1:0] TIM_CC3S: Capture / Compare 3 Selection
Bit 13 TIM_CC4P: Capture/Compare 4 output Polarity
Bit 12 TIM_CC4E: Capture/Compare 4 output Enable
Timer x capture/compare enable register (TIMx_CCER)
Address offset: 0xE020 (TIM1) and 0xF020 (TIM2)
Reset value:
TIM_C
Bit 9 TIM_CC3P
Bit 8 TIM_CC3E
C4P
29
13
rw
This configures the channel as an output or an input. If an input, it selects the input source.
00: Channel is an output.
01: Channel is an input and is mapped to TI3.
10: Channel is an input and is mapped to TI4.
11: Channel is an input and is mapped to TRGI. This requires an internal trigger input selected
by the TIM_TS bit in the TIM_SMCR register.
Note: TIM_CC3S may be written only when the channel is off (TIM_CC3E = 0 in the
If CC4 is configured as an output channel:
0: OC4 is active high.
1: OC4 is active low.
If CC4 configured as an input channel:
0: IC4 is not inverted. Capture occurs on a rising edge of IC4. When used as an external
trigger, IC4 is not inverted.
0: IC4 is inverted. Capture occurs on a falling edge of IC4. When used as an external trigger,
IC4 is inverted.
1: Capture is enabled.
If CC4 is configured as an output channel:
0: OC4 is disabled.
1: OC4 is enabled.
If CC4 configured as an input channel:
0: Capture is disabled.
1: Capture is enabled.
Refer to the CC4P description above.
Refer to the CC4E description above.
TIM_C
C4P
28
12
rw
TIMx_CCER register).
27
11
Reserved
0x0000 0000
26
10
TIM_C
C3P
25
rw
9
Doc ID 16252 Rev 8
TIM_C
C3P
24
rw
8
Reserved
23
7
Reserved
22
6
TIM_C
C2P
21
rw
5
STM32W108CB, STM32W108HB
TIM_C
C2P
20
rw
4
19
3
Reserved
18
2
TIM_C
C1P
17
rw
1
TIM_C
C1P
16
rw
0

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