STM32W108CBU63TR STMicroelectronics, STM32W108CBU63TR Datasheet - Page 119

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STM32W108CBU63TR

Manufacturer Part Number
STM32W108CBU63TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32W108CBU63TR

Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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STM32W108CB, STM32W108HB
Figure 31. Capture/compare channel 1 main circuit
Figure 32. Output stage of capture/compare channel (channel 1)
10.1.5
The capture/compare block is made of a buffer register and a shadow register. Writes and
reads always access the buffer register.
In capture mode, captures are first written to the shadow register, then copied into the buffer
register.
In compare mode, the content of the buffer register is copied into the shadow register which
is compared to the counter.
Input capture mode
In input capture mode, a capture/compare register (TIMx_CCRy) latches the value of the
counter after a transition is detected by the corresponding ICy signal. When a capture
occurs, the corresponding INT_TIMCCyIF flag in the INT_TIMxFLAG register is set, and an
interrupt request is sent if enabled.
If a capture occurs when the INT_TIMCCyIF flag is already high, then the missed capture
flag INT_TIMMISSCCyIF in the INT_TIMxMISS register is set. INT_TIMCCyIF can be
Doc ID 16252 Rev 8
General-purpose timers
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