PIC24EP64MC204-E/PT Microchip Technology, PIC24EP64MC204-E/PT Datasheet - Page 322

• Manufacturer Part Number: PIC24EP64MC204-E/PT
• Description: 16 Bit MCU, 64KB Flash, 8KB RAM, 60 MHz, 44 Pin, MCPWM,QEI, 3 OpAmp, 4 Comp, PTG
• Manufacturer: Microchip Technology

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
23.2
1.
2.
3.
4.
DS70657F-page 322
The SMPI control bits in the ADxCON2 registers:
a)
b)
c)
d)
When
(ADDMAEN = 0), the ADC has 16 result buffers.
ADC conversion results are stored sequentially
in ADC1BUF0-ADC1BUFF regardless of which
analog inputs are being used subject to the
SMPI bits and the condition described in 1c
above. There is no relationship between the
ANx input being measured and which ADC buf-
fer
conversion results will be placed in.
When
(ADDMAEN = 1), the ADC module has only 1
ADC result buffer, (i.e., ADC1BUF0), per ADC
peripheral and the ADC conversion result must
be read either by the CPU or DMA controller
before the next ADC conversion is complete to
avoid overwriting the previous value.
The DONE bit (ADxCON1<0>) is only cleared at
the start of each conversion and is set at the
completion of the conversion, but remains set
indefinitely even through the next sample phase
until the next conversion begins. If application
code is monitoring the DONE bit in any kind of
software loop, the user must consider this
behavior because the CPU code execution is
faster than the ADC. As a result, in manual sam-
ple mode, particularly where the users code is
setting the SAMP bit (ADxCON1<1>), the
DONE bit should also be cleared by the user
application just before setting the SAMP bit.
ADC Helpful Tips
Determine when the ADC interrupt flag is
set and an interrupt is generated, if
enabled.
When the CSCNA bit in the ADxCON2 reg-
isters is set to ‘1’, this determines when the
ADC analog scan channel list defined in the
AD1CSSL/AD1CSSH registers starts over
from the beginning.
When the DMA peripheral is not used
(ADDMAEN = 0), this determines when the
ADC result buffer pointer to ADC1BUF0-
ADC1BUFF, gets reset back to the
beginning at ADC1BUF0.
When
(ADDMAEN = 1), this determines when the
DMA address pointer is incremented after a
sample/conversion operation. ADC1BUF0
is the only ADC buffer used in this mode.
The
ADC1BUF0-ADC1BUFF gets reset back to
the beginning at ADC1BUF0. The DMA
address is incremented after completion of
every 32nd sample/conversion operation.
Conversion results are stored in the
ADC1BUF0 register for transfer to RAM
using DMA.
(ADC1BUF0-ADC1BUFF)
the
the
ADC
the
DMA
DMA
DMA
result
module
module
peripheral
buffer
is
is
pointer
that
is
disabled
enabled
used
the
to
5.
23.3
Many useful resources are provided on the main prod-
uct page of the Microchip web site for the devices listed
in this data sheet. This product page, which can be
accessed using this link, contains the latest updates
and additional information.
23.3.1
• Section 16. “Analog-to-Digital Converter
• Code Samples
• Application Notes
• Software Libraries
• Webinars
• All related dsPIC33E/PIC24E Family Reference
• Development Tools
Note:
(ADC)” (DS70621)
Manuals Sections
Enabling op amps, comparator inputs and exter-
nal voltage references can limit the availability of
analog inputs (ANx pins). For example, when
Op amp 2 is enabled, the pins for AN0, AN1, and
AN2 are used by the op amp’s inputs and output.
This negates the usefulness of Alternate Input
mode since the MUXA selections uses AN0-
AN2. Carefully study the ADC block diagram to
determine the configuration that will best suit
your application. Configuration examples are
available in Section 16. “Analog-to-Digital
Converter
“dsPIC33E/PIC24E Family Reference Manual”.
ADC Resources
In the event you are not able to access the
product page using the link above, enter
this URL in your browser:
http://www.microchip.com/wwwproducts/
Devices.aspx?dDocName=en555464
KEY RESOURCES
(ADC)”
 2011-2012 Microchip Technology Inc.
(DS70621)
in
the