PIC24EP64MC204-E/PT Microchip Technology, PIC24EP64MC204-E/PT Datasheet - Page 216

• Manufacturer Part Number: PIC24EP64MC204-E/PT
• Description: 16 Bit MCU, 64KB Flash, 8KB RAM, 60 MHz, 44 Pin, MCPWM,QEI, 3 OpAmp, 4 Comp, PTG
• Manufacturer: Microchip Technology

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
REGISTER 14-2:
DS70657F-page 216
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-9
bit 8
bit 7
bit 6
bit 5
Note 1:
ICTRIG
R/W-0
U-0
—
2:
3:
4:
5:
6:
(2)
The IC32 bit in both the ODD and EVEN IC must be set to enable Cascade mode.
The input source is selected by the SYNCSEL<4:0> bits of the ICxCON2 register.
This bit is set by the selected input source (selected by SYNCSEL<4:0> bits). It can be read, set, and
cleared in software.
Do not use the ICx module as its own sync or trigger source.
This option should only be selected as trigger source and not as a synchronization source.
Each Input Capture module (ICx) has one PTG input source. See
Generator (PTG) Module”
PTGO8 = IC1
PTGO9 = IC2
PTGO10 = IC3
PTGO11 = IC4
Unimplemented: Read as ‘0’
IC32: 32-bit Timer Mode Select bit (Cascade mode)
1 = ODD IC and EVEN IC form a single 32-bit Input Capture module
0 = Cascade module operation disabled
ICTRIG: Trigger Operation Select bit
1 = Input source used to trigger the input capture timer (Trigger mode)
0 = Input source used to synchronize input capture timer to timer of another module
TRIGSTAT: Timer Trigger Status bit
1 = ICxTMR has been triggered and is running
0 = ICxTMR has not been triggered and is being held clear
Unimplemented: Read as ‘0’
TRIGSTAT
R/W/HS-0
(Synchronization mode)
U-0
—
ICxCON2: INPUT CAPTURE x CONTROL REGISTER 2
(3)
HS = Set by Hardware
W = Writable bit
U-0
U-0
—
—
for more information.
R/W-0
U-0
—
(3)
(2)
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
R/W-1
U-0
—
SYNCSEL<4:0>
Section 24.0 “Peripheral Trigger
R/W-1
U-0
—
 2011-2012 Microchip Technology Inc.
(1)
R/W-0
U-0
—
R/W-0
R/W-1
IC32
bit 8
bit 0